Vishnuram Abhinav

According to our database, Vishnuram Abhinav authored at least 4 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Low-Cost, Point-of-Care Potassium Ion Sensing Electrode in EGFET Configuration for Ultra-High Sensitivity.

Vishnuram Abhinav, Tejas R. Naik

IEEE Access, 2024

2016

A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET.

Dheeraj Kumar Sinha, Amitabh Chatterjee, Vishnuram Abhinav, Gaurav Trivedi, Victor Koldyaev

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

A Novel Co-design Methodology for Optimizing ESD Protection Device Using Layout Level Approach.

Vishnuram Abhinav, Dheeraj Kumar Sinha, Amitabh Chatterjee, Forrest Brewer

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

2015

Methodology for optimizing ESD protection for high speed LVDS based I/Os.

Vishnuram Abhinav, Amitabh Chatterjee, Dheeraj Kumar Sinha, Rajan Singh

Proceedings of the 19th International Symposium on VLSI Design and Test, 2015