Vishnu Yalala

According to our database, Vishnu Yalala authored at least 2 papers between 2006 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

A 32-core RISC microprocessor with network accelerators, power management and testability features.

Brian Miller, Derek Brasili, Tim Kiszely, Rob Kuhn, Rahul Mehrotra, Manan Salvi, Mandar Kulkarni, Anand Varadharajan, Shi-Huang Yin, William Lin, Adam Hughes, Bill Stysiack, Vasu Kandadi, Ilan Pragaspathi, Dan Hartman, David Carlson, Vishnu Yalala, Thucydides Xanthopoulos, Scott E. Meninger, Ethan Crain, Mark Spaeth, Akin Aina, Suresh Balasubramanian, Joe Vulih, Pragati Tiwary, David Lin, Richard Kessler, Bruce Fishbein, Anil Jain

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2006

A 16-Core RISC Microprocessor with Network Extensions.

Vishnu Yalala, Derek Brasili, David Carlson, Adam Hughes, Anil Jain, Tim Kiszely, Kolar Kodandapani, Anand Varadharajan, Thucydides Xanthopoulos

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006