Vishesh Mishra

According to our database, Vishesh Mishra authored at least 17 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

CPU-Doctor: when a device's heart-beat can be an acoustic side-channel disassembler.

Oswa M. Amro, Vishesh Mishra, Rohit Negi, Urbi Chatterjee

J. Cryptogr. Eng., September, 2024

Security Implications of Approximation: A Study of Trojan Attacks on Approximate Adders and Multipliers.

Vishesh Mishra, Sparsh Mittal, Nirbhay Mishra, Rekha Singhal

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023

VADF: Versatile Approximate Data Formats for Energy-Efficient Computing.

Vishesh Mishra, Sparsh Mittal, Neelofar Hassan, Rekha Singhal, Urbi Chatterjee

ACM Trans. Embed. Comput. Syst., October, 2023

B2T: The Third Logical Value of a Bit.

Dipesh, Vishesh Mishra, Urbi Chatterjee

IACR Cryptol. ePrint Arch., 2023

DARK-Adders: Digital Hardware Trojan Attack on Block-based Approximate Adders.

Vishesh Mishra, Neelofar Hassan, Akshay Mehta, Urbi Chatterjee

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

Novel, Configurable Approximate Floating-point Multipliers for Error-Resilient Applications.

Vishesh Mishra, Sparsh Mittal, Rekha Singhal, Manoj Nambiar

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Aiding to Multimedia Accelerators: A Hardware Design for Efficient Rounding of Binary Floating Point Numbers.

Mahendra Rathor, Vishesh Mishra, Urbi Chatterjee

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

VMEO: Vector Modeling Errors and Operands for Approximate adders.

Vishesh Mishra, Urbi Chatterjee

IACR Cryptol. ePrint Arch., 2022

On the Performance and Optimization of HAPS Assisted Dual-Hop Hybrid RF/FSO System.

Rima Deka, Vishesh Mishra, Imtiaz Ahmed, Sanya Anees, Md. Sahabul Alam

IEEE Access, 2022

EFCSA: An Efficient Carry Speculative Approximate Adder with Rectification.

Saurabh Singh, Vishesh Mishra, Sagar Satapathy, Divy Pandey, Kaustav Goswami, Dip Sankar Banerjee, Babita Jajodia

Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

HPAM: An 8-bit High-Performance Approximate Multiplier Design for Error Resilient Applications.

Divy Pandey, Vishesh Mishra, Saurabh Singh, Sagar Satapathy, Babita Jajodia, Dip Sankar Banerjee

Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

AxLEAP: Enabling Low-Power Approximations Through Unified Power Format.

Sagar Satapathy, Saurabh Singh, Kaustav Goswami, Vishesh Mishra, Divy Pandey, Dip Sankar Banerjee

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

ART-MAC: Approximate Rounding and Truncation based MAC Unit for Fault-Tolerant Applications.

Vishesh Mishra, Divy Pandey, Saurabh Singh, Sagar Satapathy, Kaustav Goswami, Babita Jajodia, Dip Sankar Banerjee

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

MEGA-MAC: A Merged Accumulation based Approximate MAC Unit for Error Resilient Applications.

Vishesh Mishra, Sparsh Mittal, Saurabh Singh, Divy Pandey, Rekha Singhal

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021

Performance Analysis of HAPS Assisted Dual-Hop Hybrid RF/FSO System.

Rima Deka, Vishesh Mishra, Imtiaz Ahmed, Sanya Anees, Md. Sahabul Alam

Proceedings of the 94th IEEE Vehicular Technology Conference, 2021

SAM: A Segmentation Based Approximate Multiplier for Error Tolerant Applications.

Divy Pandey, Saurabh Singh, Vishesh Mishra, Sagar Satapathy, Dip Sankar Banerjee

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

An Approximate Carry Estimating Simultaneous Adder with Rectification.

Rajat Bhattacharjya, Vishesh Mishra, Saurabh Singh, Kaustav Goswami, Dip Sankar Banerjee

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020