Vishal Saxena

According to our database, Vishal Saxena authored at least 48 papers between 2005 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Optical Interconnects Using Hybrid Integration of CMOS and Silicon-Photonic ICs.

Vishal Saxena, Ankur Kumar, Shubham Mishra, Samuel Palermo, Kadaba R. Lakshmikumar

IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

A 7×4 Silicon Photonic Reconfigurable Optical Analog Processor with Algorithmic Calibration.

Md Jubayer Shawon, Vishal Saxena

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2024

Compact Convolutional SNN Architecture for the Neuromorphic Speech Denoising.

Anuar Dorzhigulov, Vishal Saxena

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

A Sub-1pJ/bit Laser Power Independent 32Gb/s Silicon Photonic EAM Driver in 65nm CMOS.

Shubham Mishra, Vishal Saxena

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

Compact Modeling and Rapid Simulation of Silicon Photonic Micro-Disk and Ring Modulators.

Vishal Saxena, Md Jubayer Shawon

CoRR, 2023

Automatic In-situ Optical Linearization of Silicon Photonic Ring-Assisted MZ Modulator for Integrated RF Photonic SoCs.

Md Jubayer Shawon, Vishal Saxena

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2023

A Silicon Photonic Reconfigurable Optical Analog Processor (SiROAP) with a 4x4 Optical Mesh.

Md Jubayer Shawon, Vishal Saxena

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

Power Linear DACs (PLDACs) for Configuration and Control of Silicon Photonic Integrated Circuits.

Vikas Kumar, Shubham Mishra, Vishal Saxena

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

A Deep Unsupervised Feature Learning Spiking Neural Network With Binarized Classification Layers for the EMNIST Classification.

Ruthvik Vaila, John N. Chiasson, Vishal Saxena

IEEE Trans. Emerg. Top. Comput. Intell., 2022

A Hybrid CMOS Photonic 25Gbps Microring Transmitter with a -0.5-1.2V Direct-Coupled Drive.

Shubham Mishra, Md Jubayer Shawon, Anuar Dorzhigulov, Vishal Saxena

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Hybrid CMOS-RRAM Spiking CNNs with Time-Domain Max-pooling and Integrator Re-use.

Anuar Dorzhigulov, Shubham Mishra, Vishal Saxena

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Mixed-Signal Neuromorphic Computing Circuits Using Hybrid CMOS-RRAM Integration.

Vishal Saxena

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Analysis of Trade-offs in RF Photonic Links based on Multi-Bias Tuning of Silicon Photonic Ring-Assisted Mach Zehnder Modulators.

Md Jubayer Shawon, Vishal Saxena

CoRR, 2021

A Mixed-Signal Convolutional Neural Network Using Hybrid CMOS-RRAM Circuits.

Vishal Saxena

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

Rapid Simulation of Photonic Integrated Circuits Using Verilog-A Compact Models.

Md Jubayer Shawon, Vishal Saxena

IEEE Trans. Circuits Syst., 2020

Analysis of RF Photonic Link using Silicon Photonic Ring-Assisted Mach Zehnder Modulator.

Md Jubayer Shawon, Vishal Saxena

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

A Process-Variation Robust RRAM-Compatible CMOS Neuron for Neuromorphic System-on-a-Chip.

Vishal Saxena

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Continuous Learning in a Single-Incremental-Task Scenario with Spike Features.

Ruthvik Vaila, John N. Chiasson, Vishal Saxena

Proceedings of the International Conference on Neuromorphic Systems, 2020

2019

Deep Convolutional Spiking Neural Networks for Image Classification.

Ruthvik Vaila, John N. Chiasson, Vishal Saxena

CoRR, 2019

A CMOS Photonic Optical PAM4 Transmitter Linearized using Three-Segment Ring Modulator.

Rui Wang, Vishal Saxena

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

High LRS-Resistance CMOS Memristive Synapses for Energy-Efficient Neuromorphic SoCs.

Vishal Saxena

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Feature Extraction using Spiking Convolutional Neural Networks.

Ruthvik Vaila, John N. Chiasson, Vishal Saxena

Proceedings of the International Conference on Neuromorphic Systems, 2019

2018

From Design to Test: A High-Speed PRBS.

Kehan Zhu, Vishal Saxena

IEEE Trans. Very Large Scale Integr. Syst., 2018

Dendritic-Inspired Processing Enables Bio-Plausible STDP in Compound Binary Synapses.

Xinyu Wu, Vishal Saxena

CoRR, 2018

Design and Compact Modeling of Silicon-Photonic Coupling-Based Ring Modulators for Optical Interconnects.

Rui Wang, Md Jubayer Shawon, Vishal Saxena

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Design and Modeling of Silicon Photonic Ring-Based Linearized RF-to-Optical Modulator.

Md Jubayer Shawon, Rui Wang, Vishal Saxena

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

A Compact CMOS Memristor Emulator Circuit and its Applications.

Vishal Saxena

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Energy-Efficient CMOS Memristive Synapses for Mixed-Signal Neuromorphic System-on-a-Chip.

Vishal Saxena, Xinyu Wu, Kehan Zhu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A 3D-Integrated 56 Gb/s NRZ/PAM4 Reconfigurable Segmented Mach-Zehnder Modulator-Based Si-Photonics Transmitter.

Cheng Li, Kunzhi Yu, Jinsoo Rhim, Kehan Zhu, Nan Qi, Marco Fiorentino, Thierry Pinguet, Mark Peterson, Vishal Saxena, Samuel Palermo

Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018

2017

Case Study of a Hybrid Optoelectronic Limiting Receiver.

Kehan Zhu, Vishal Saxena

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Towards spiking neuromorphic system-on-a-chip with bio-plausible synapses using emerging devices.

Vishal Saxena, Xinyu Wu, Ira Srivastava, Kehan Zhu

Proceedings of the 4th ACM International Conference on Nanoscale Computing and Communication, 2017

Behavioral modeling and characterization of silicon photonic Mach-Zehnder modulator.

Kehan Zhu, Rui Wang, Xinyu Wu, Vishal Saxena

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Realization of a 10 GHz PLL in IBM 130 nm SiGe BiCMOS process for optical transmitter.

Kehan Zhu, Sakkarapani Balagopal, Xinyu Wu, Vishal Saxena

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Enabling bio-plausible multi-level STDP using CMOS neurons with dendrites and bistable RRAMs.

Xinyu Wu, Vishal Saxena

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

2016

Modeling and optimization of the bond-wire interface in a Hybrid CMOS-photonic traveling-wave MZM transmitter.

Kehan Zhu, Vishal Saxena, Xinyu Wu

Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

Tutorial 4B: ADC design - from system architecture to transistor level design.

Bhibhudatta Sahoo, Vishal Saxena, Karan S. Bhatia

Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

2015

Design Considerations for Traveling-Wave Modulator-Based CMOS Photonic Transmitters.

Kehan Zhu, Vishal Saxena, Xinyu Wu, Wan Kuang

IEEE Trans. Circuits Syst. II Express Briefs, 2015

A CMOS Spiking Neuron for Brain-Inspired Neural Networks With Resistive Synapses and In Situ Learning.

Xinyu Wu, Vishal Saxena, Kehan Zhu, Sakkarapani Balagopal

IEEE Trans. Circuits Syst. II Express Briefs, 2015

Homogeneous Spiking Neuromorphic System for Real-World Pattern Recognition.

Xinyu Wu, Vishal Saxena, Kehan Zhu

IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

A comprehensive design approach for a MZM based PAM-4 silicon photonic transmitter.

Kehan Zhu, Vishal Saxena, Xinyu Wu

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A CMOS spiking neuron for dense memristor-synapse connectivity for brain-inspired computing.

Xinyu Wu, Vishal Saxena, Kehan Zhu

Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

2014

Compact Verilog-A modeling of silicon traveling-wave modulator for hybrid CMOS photonic circuit design.

Kehan Zhu, Vishal Saxena, Wan Kuang

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2013

Design of a 10-Gb/s integrated limiting receiver for silicon photonics interconnects.

Kehan Zhu, Sakkarapani Balagopal, Vishal Saxena, Wan Kuang

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Systematic synthesis of cascaded continuous-time ΔΣ ADCs for wideband data conversion.

Sakkarapani Balagopal, Kehan Zhu, Vishal Saxena

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012

A 1 GS/s, 31 MHz BW, 76.3 dB dynamic range, 34 mW CT-ΔΣ ADC with 1.5 cycle quantizer delay and improved STF.

Sakkarapani Balagopal, Vishal Saxena

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

Design of wideband continuous-time ΔΣ ADCs using two-step quantizers.

Sakkarapani Balagopal, Vishal Saxena

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2011

Efficient design and synthesis of decimation filters for wideband delta-sigma ADCs.

Rajaram Mohan Roy Koppula, Sakkarapani Balagopal, Vishal Saxena

Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

2005

A Non-invasive, Multi-modality Approach Based on NIRS and MRI Techniques For Monitoring Intracranial Brain Tumor Angiogenesis.

Vishal Saxena, Jon-Fredrik Nielsen, Ignacio Gonzalez-Gomez, Gevorg Karapetyan, Vazgen Khankaldyyan, Marvin D. Nelson Jr., Walter E. Laug

Proceedings of the 34th Applied Image Pattern Recognition Workshop (AIPR 2005), 2005