Vishal Ganesan

According to our database, Vishal Ganesan authored at least 2 papers between 2020 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

Design Optimization of MV-NMOS to Improve Holding Voltage of a 28nm CMOS Technology ESD Power Clamp.

Sagar Premnath Karalkar, Vishal Ganesan, Milova Paul, Kyong Jin Hwang, Robert Gauthier

Proceedings of the IEEE International Reliability Physics Symposium, 2021

2020

Design Optimization of MV-NMOS for ESD Self-protection in 28nm CMOS technology.

Kyong Jin Hwang, Sagar Premnath Karalkar, Vishal Ganesan, Sevashanmugam Marimuthu, Alban Zaka, Tom Herrmann, Bhoopendra Singh, Robert Gauthier

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020