Vipul Kumar Singhal

According to our database, Vipul Kumar Singhal authored at least 7 papers between 2013 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

150nA IQ, Quad Input - Quad Output, Intelligent Integrated Power Management for IoT Applications.

Vipul Singhal, Rajat Chauhan, Vinod Menezes, R. R. Manikandan, Raveesh Magod, Mahesh Mehendale, Anantha P. Chandrakasan

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

2019

Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy Harvesting.

Sundeep Javvaji, Vipul Singhal, Vinod Menezes, Rajat Chauhan, Shanthi Pavan

IEEE J. Solid State Circuits, 2019

2018

Single Inductor Dual Output Buck Converter for Low Power Applications and Its Stability Analysis.

Sowmya Sankaranarayanan, Kulkarni Chaitali Vinod, Aswanth Sreekumar, Tonse Laxminidhi, Vipul Singhal, Rajat Chauhan

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled Systems.

R. R. Manikandan, Vipul Kumar Singhal, Rajat Chauhan, Vinod Menezes, Mahesh Mehendale

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

Multi-Step Bias-Flip Rectification for Piezoelectric Energy Harvesting.

Sundeep Javvaji, Vipul Singhal, Vinod Menezes, Rajat Chauhan, Shanthi Pavan

Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

2015

8.3 A 10.5μA/MHz at 16MHz single-cycle non-volatile memory access microcontroller with full state retention at 108nA in a 90nm process.

Vipul Kumar Singhal, Vinod Menezes, Srinivasa Chakravarthy, Mahesh Mehendale

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2013

A Methodology for Early and Accurate Analysis of Inrush and Latency Tradeoffs during Power-Domain Wakeup.

Vipul Singhal, Ayon Dey, Suresh Mallala, Somshubhra Paul

Proceedings of the VLSI Design and Test, 17th International Symposium, 2013