Vippin Chandhar

According to our database, Vippin Chandhar authored at least 1 paper in 2017.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2017

Realization of Multiplier Using Delay Efficient Cyclic Redundant Adder.

K. Dheepika, K. S. Jevasankari, Vippin Chandhar, Binsu J. Kailath

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017