Vippin Chandhar

According to our database1, Vippin Chandhar authored at least 1 paper in 2017.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
Realization of Multiplier Using Delay Efficient Cyclic Redundant Adder.
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017


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