Vinoo Srinivasan
According to our database1,
Vinoo Srinivasan
authored at least 11 papers
between 1996 and 2000.
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Bibliography
2000
A Technique for Dynamic High-Level Exploration During Behavioral-Partitioning for Multi-Device Architectures.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000
Behavioral Partitioning with Synthesis for Multi-FPGA Architectures under Interconnect, Area, and Latency Constraints.
Proceedings of the Parallel and Distributed Processing, 2000
1999
Proceedings of the Parallel and Distributed Processing, 1999
Throughput Optimization with Design Space Exploration During Partitioning for Multi-FPGA Architectures.
Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999
Task-Level Partitioning and RTL Design Space Exploration for Multi-FPGA Architectures.
Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999
1998
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998
An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi-FPGA Architectures.
Proceedings of the Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30, 1998
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998
Proceedings of the 1998 Design, 1998
1996
Proceedings of the conference on European design automation, 1996
Proceedings of the 1996 International Conference on Application-Specific Systems, 1996