Vinodh Gopal

According to our database, Vinodh Gopal authored at least 12 papers between 1999 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Intel HEXL: Accelerating Homomorphic Encryption with Intel AVX512-IFMA52.

Fabian Boemer, Sejun Kim, Gelila Seifu, Fillipe D. M. de Souza, Vinodh Gopal

IACR Cryptol. ePrint Arch., 2021

2019

Toward Postquantum Security for Embedded Cores.

Rafael Misoczki, Sean Gulley, Vinodh Gopal, Martin G. Dixon, Hrvoje Vrsalovic, Wajdi K. Feghali

IEEE Micro, 2019

A 1.4GHz 20.5Gbps GZIP decompression accelerator in 14nm CMOS featuring dual-path out-of-order speculative Huffman decoder and multi-write enabled register file array.

Sudhir Satpathy, Vikram B. Suresh, Raghavan Kumar, Vinodh Gopal, James Guilford, Mark A. Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Ram Krishnamurthy, Vivek De, Sanu Mathew

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 220-900mV 179Mcode/s 36pJ/code Canonical Huffman Encoder for DEFLATE Compression in 14nm CMOS.

Sudhir Satpathy, Vikram B. Suresh, Raghavan Kumar, Vinodh Gopal, James Guilford, Kirk Yap, Mark A. Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Ram Krishnamurthy, Sanu Mathew

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018

34.4Mbps 1.56Tbps/W DEFLATE Decompression Accelerator Featuring Block-Adaptive Huffman Decoder in 14nm Tri-Gate CMOS for IoT Platforms.

Sudhir Satpathy, Sanu Mathew, Vikram B. Suresh, Vinodh Gopal, James Guilford, Mark A. Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Kam Krisnnamurthy

Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

A 280mV 3.1pJ/code Huffman Decoder for DEFLATE Decompression Featuring Opportunistic Code Skip and 3-way Symbol Generation in 14nm Tri-gate CMOS.

Sudhir Satpathy, Sanu Mathew, Vikram B. Suresh, Vinodh Gopal, James Guilford, Mark A. Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Ram Krishnamurthy

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2012

Data De-duplication and Event Processing for Security Applications on an Embedded Processor.

Harsha Nagarajaiah, Shambhu J. Upadhyaya, Vinodh Gopal

Proceedings of the IEEE 31st Symposium on Reliable Distributed Systems, 2012

2011

Accelerated Processing of Secure Email by Exploiting Built-in Security Features on the Intel EP80579 Integrated Processor with Intel QuickAssist Technology.

Vallisha Keshavamurthy, Shambhu J. Upadhyaya, Vinodh Gopal

Proceedings of the 30th IEEE Symposium on Reliable Distributed Systems Workshops, 2011

2009

A hybrid network coding technique for single-hop wireless networks.

Tuan Tran, Thinh P. Nguyen, Bella Bose, Vinodh Gopal

IEEE J. Sel. Areas Commun., 2009

2008

Fast multiplication techniques for public key cryptography.

Vinodh Gopal, Satyajit Grover, Michael E. Kounavis

Proceedings of the 13th IEEE Symposium on Computers and Communications (ISCC 2008), 2008

2007

Fast Modular Reduction.

William Hasenplaugh, Gunnar Gaubatz, Vinodh Gopal

Proceedings of the 18th IEEE Symposium on Computer Arithmetic (ARITH-18 2007), 2007

1999

Techniques to Encode and Compress Fault Dictionaries.

Sreejit Chakravarty, Vinodh Gopal

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999