Vinicius S. Livramento
Orcid: 0000-0001-5167-6359
According to our database1,
Vinicius S. Livramento
authored at least 20 papers
between 2011 and 2022.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2022
Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2019
Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
How Deep Learning Can Drive Physical Synthesis Towards More Predictable Legalization.
Proceedings of the 2019 International Symposium on Physical Design, 2019
2018
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017
How Game Engines Can Inspire EDA Tools Development: A use case for an open-source physical design library.
Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
Streak: Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups.
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
ACM Trans. Design Autom. Electr. Syst., 2016
Evaluating the impact of circuit legalization on incremental optimization techniques.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
2015
Timing-Driven Placement Based on Dynamic Net-Weighting for Efficient Slack Histogram Compression.
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015
Exploiting Non-Critical Steiner Tree Branches for Post-Placement Timing Optimization.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
2014
ACM Trans. Design Autom. Electr. Syst., 2014
2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
2011
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011
An energy-efficient 8×8 2-D DCT VLSI architecture for battery-powered portable devices.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011