Vinesh Srinivasan
According to our database1,
Vinesh Srinivasan
authored at least 6 papers
between 2012 and 2020.
Collaborative distances:
Collaborative distances:
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On csauthors.net:
Bibliography
2020
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
2017
H3 (Heterogeneity in 3D): A Logic-on-Logic 3D-Stacked Heterogeneous Multi-Core Processor.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
2015
Under 100-cycle thread migration latency in a single-ISA heterogeneous multi-core processor.
Proceedings of the 2015 IEEE Hot Chips 27 Symposium (HCS), 2015
2013
Performance and energy efficient cache system design: Simultaneous execution of multiple applications on heterogeneous cores.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013
2012
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012