Vincent Rieß

According to our database, Vincent Rieß authored at least 7 papers between 2017 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

A 130 nm-SiGe-BiCMOS Low-Power Receiver Based on Distributed Amplifier Techniques for Broadband Applications From 140 GHz to 200 GHz.

Paolo Valerio Testa, Vincent Rieß, Corrado Carta, Frank Ellinger

IEEE Open J. Circuits Syst., 2021

2019

A 20 Gb/s 3.8 pJ/bit 1: 4 Demux in 45-nm CMOS.

Sami Ur Rehman, Mahdi M. Khafaji, Vincent Rieß, Ali Ferchichi, Florian Protze, Corrado Carta, Frank Ellinger

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Active Single-Ended to Differential Converter (Balun) for DC up to 70 GHz in 130 nm SiGe.

Paul Stärke, Vincent Rieß, Corrado Carta, Frank Ellinger

Proceedings of the 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019

2018

200 GHz chip-to-chip wireless power transfer.

Paolo Valerio Testa, Vincent Rieß, Corrado Carta, Frank Ellinger

Proceedings of the 2018 IEEE Radio and Wireless Symposium, 2018

Analysis and Design of a 60 GHz Fully-Differential Frequency Doubler in 130 nm SiGe BiCMOS.

Vincent Rieß, Paolo Valerio Testa, Corrado Carta, Frank Ellinger

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Wideband Amplifier with Integrated Power Detector for 100 GHz to 200 GHz mm-Wave Applications.

Paul Stärke, Vincent Rieß, Corrado Carta, Frank Ellinger

Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018

2017

A 173-200 GHz quadrature voltage-controlled oscillator in 130 nm SiGe BiCMOS.

Paul Stärke, Vincent Rieß, Corrado Carta, Frank Ellinger

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017