Vincent Huard

According to our database1, Vincent Huard authored at least 49 papers between 2003 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Soft-Error Tolerance by Guard-Gate Structures on Flip-Flops in 22 and 65 nm FD-SOI Technologies.
IEICE Trans. Electron., 2024

2023
A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

Radiation Hardness Evaluations of a Stacked Flip Flop in a 22 nm FD-SOI Process by Heavy-Ion Irradiation.
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

Embracing the new era of AI at the edge.
Proceedings of the International Conference on IC Design and Technology, 2023

2022
Correlation Technologies for OTA Testing of mmWave Mobile Devices Using Energy Metrics.
Proceedings of the 2022 IEEE Radio and Wireless Symposium, 2022

Runtime Test Solution for Adaptive Aging Compensation and Fail Operational Safety mode.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021
A 0.021mm<sup>2</sup> PVT-Aware Digital-Flow-Compatible Adaptive Back-Biasing Regulator with Scalable Drivers Achieving 450% Frequency Boosting and 30% Power Reduction in 22nm FDSOI Technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

Industrial best practice: cases of study by automotive chip- makers.
Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021

2018
Investigation of speed sensors accuracy for process and aging compensation.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Resilient automotive products through process, temperature and aging compensation schemes.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Key parameters driving transistor degradation in advanced strained SiGe channels.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Managing electrical reliability in consumer systems for improved energy efficiency.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

A new method for quickly evaluating reversible and permanent components of the BTI degradation.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Modeling self-heating effects in advanced CMOS nodes.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

NBTI aged cell rejuvenation with back biasing and resulting critical path reordering for digital circuits in 28nm FDSOI.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Characterization of Low Drop-Out during ageing and design for yield.
Microelectron. Reliab., 2017

Enabling robust automotive electronic components in advanced CMOS nodes.
Microelectron. Reliab., 2017

Cognitive approach to support dynamic aging compensation.
Proceedings of the IEEE International Test Conference, 2017

Dynamic aging compensation and Safety measures in Automotive environment.
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Investigation of critical path selection for in-situ monitors insertion.
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Workload dependent reliability timing analysis flow.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Performance vs. reliability adaptive body bias scheme in 28 nm & 14 nm UTBB FDSOI nodes.
Microelectron. Reliab., 2016

Potentiality of healing techniques in hot-carrier damaged 28 nm FDSOI CMOS nodes.
Microelectron. Reliab., 2016

Early system failure prediction by using aging in situ monitors: Methodology of implementation and application results.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016

28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

In-situ slack monitors: taking up the challenge of on-die monitoring of variability and reliability.
Proceedings of the 1st IEEE International Verification and Security Workshop, 2016

Activity profiling: Review of different solutions to develop reliable and performant design.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Hot-carrier and BTI damage distinction for high performance digital application in 28nm FDSOI and 28nm LP CMOS nodes.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Workload Impact on BTI HCI Induced Aging of Digital Circuits: A System level Analysis.
Proceedings of the Workshop on Early Reliability Modeling for Aging and Variability in Silicon Systems, 2016

Study of workload impact on BTI HCI induced aging of digital circuits.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Early failure prediction by using in-situ monitors: Implementation and application results.
Proceedings of the Workshop on Early Reliability Modeling for Aging and Variability in Silicon Systems, 2016

2015
Impact of gate oxide breakdown in logic gates from 28nm FDSOI CMOS technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

28nm UTBB FDSOI product reliability/performance trade-off optimization through body bias operation.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

From BTI variability to product failure rate: A technology scaling perspective.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Workload-dependent BTI analysis in a processor core at high level.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Physical understanding of low frequency degradation of NMOS TDDB in High-k metal gate stack-based technology. Implication on lifetime assessment.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Digital circuits reliability with in-situ monitors in 28nm fully depleted SOI.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Timing in-situ monitors: Implementation strategy and applications results.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2012
Microscopic scale characterization and modeling of transistor degradation under HC stress.
Microelectron. Reliab., 2012

2011
A bottom-up approach for System-On-Chip reliability.
Microelectron. Reliab., 2011

Bottom-up digital system-level reliability modeling.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2007
Design-In Reliability for 90-65nm CMOS Nodes Submitted to Hot-Carriers and NBTI Degradation.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

2006
Designing in reliability in advanced CMOS technologies.
Microelectron. Reliab., 2006

NBTI degradation: From physical mechanisms to modelling.
Microelectron. Reliab., 2006

2005
Multi-vibrational hydrogen release: Physical origin of T<sub>bd</sub>, Q<sub>bd</sub> power-law voltage dependence of oxide breakdown in ultra-thin gate oxides.
Microelectron. Reliab., 2005

A thorough investigation of MOSFETs NBTI degradation.
Microelectron. Reliab., 2005

Impacts of the recovery phenomena on the worst-case of damage in DC/AC stressed ultra-thin NO gate-oxide MOSFETs.
Microelectron. Reliab., 2005

2003
New insights into the change of voltage acceleration and temperature activation of oxide breakdown.
Microelectron. Reliab., 2003

On the role of holes in oxide breakdown mechanism in inverted nMOSFETs.
Microelectron. Reliab., 2003


  Loading...