Vinayak S. Prabhu
Orcid: 0000-0002-0780-0970
According to our database1,
Vinayak S. Prabhu
authored at least 34 papers
between 2001 and 2024.
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Bibliography
2024
Fast Robust Monitoring for Signal Temporal Logic with Value Freezing Operators (STL*).
CoRR, 2024
Fast Robust Monitoring for Signal Temporal Logic with Value Freezing Operators (STL<sup>*</sup>).
Proceedings of the 22nd ACM-IEEE International Symposium on Formal Methods and Models for System Design, 2024
Fast and Scalable Monitoring for Value-Freeze Operator augmented Signal Temporal Logic.
Proceedings of the 27th ACM International Conference on Hybrid Systems: Computation and Control, 2024
Proceedings of the ECAI 2024 - 27th European Conference on Artificial Intelligence, 19-24 October 2024, Santiago de Compostela, Spain, 2024
2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023
2022
Towards Efficient Input Space Exploration for Falsification of Input Signal Class Augmented STL.
Proceedings of the 20th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2022
Proceedings of the HSCC '22: 25th ACM International Conference on Hybrid Systems: Computation and Control, Milan, Italy, May 4, 2022
Proceedings of the 8th ACM on Cyber-Physical System Security Workshop, 2022
2019
Shrinking Horizon Model Predictive Control With Signal Temporal Logic Constraints Under Stochastic Disturbances.
IEEE Trans. Autom. Control., 2019
2018
Proceedings of the Proceedings 3rd Workshop on formal reasoning about Causation, 2018
Parameter optimization in control software using statistical fault localization techniques.
Proceedings of the 9th ACM/IEEE International Conference on Cyber-Physical Systems, 2018
2017
ACM Trans. Embed. Comput. Syst., 2017
Proceedings of the 28th International Conference on Concurrency Theory, 2017
Shrinking Horizon Model Predictive Control with chance-constrained signal temporal logic specifications.
Proceedings of the 2017 American Control Conference, 2017
2016
Proceedings of the 19th International Conference on Hybrid Systems: Computation and Control, 2016
2015
IEEE Trans. Autom. Control., 2015
Proceedings of the 18th International Conference on Hybrid Systems: Computation and Control, 2015
2014
2013
Synthesis of memory-efficient, clock-memory free, and non-Zeno safety controllers for timed systems.
Inf. Comput., 2013
Quantitative timed simulation functions and refinement metrics for real-time systems.
Proceedings of the 16th international conference on Hybrid systems: computation and control, 2013
2012
Quantitative Timed Simulation Functions and Refinement Metrics for Timed Systems (Full Version)
CoRR, 2012
Proceedings of the 12th International Conference on Embedded Software, 2012
2011
Synthesis of Memory-Efficient Real-Time Controllers for Safety Objectives (Full Version)
CoRR, 2011
Proceedings of the 14th ACM International Conference on Hybrid Systems: Computation and Control, 2011
2009
Proceedings of the Second European Workshop on System Security, 2009
2008
Proceedings of the Hybrid Systems: Computation and Control, 11th International Workshop, 2008
2007
Proceedings of the Automata, Languages and Programming, 34th International Colloquium, 2007
2006
Proceedings of the Formal Modeling and Analysis of Timed Systems, 2006
2005
Proceedings of the Formal Modeling and Analysis of Timed Systems, 2005
2001
Proceedings of the Hybrid Systems: Computation and Control, 4th International Workshop, 2001