Ville Lappalainen
According to our database1,
Ville Lappalainen
authored at least 16 papers
between 1998 and 2005.
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Bibliography
2005
A Method for Designing High-Radix Multiplier-Based Processing Units for Multimedia Applications.
IEEE Trans. Circuits Syst. Video Technol., 2005
Microprocess. Microsystems, 2005
A Radix-8 Multiplier Design and Its Extension for Efficient Implementation of Imaging Algorithms.
Proceedings of the Embedded Computer Systems: Architectures, 2005
2004
A Family of Accelerators for Matrix-Vector Arithmetics Based on High-Radix Multiplier Structures.
Proceedings of the Computer Systems: Architectures, 2004
2003
J. VLSI Signal Process., 2003
IEEE Trans. Circuits Syst. Video Technol., 2003
Signal Process. Image Commun., 2003
Proceedings of the 2003 International Symposium on Information Technology (ITCC 2003), 2003
2002
Overview of research efforts on media ISA extensions and their usage in video coding.
IEEE Trans. Circuits Syst. Video Technol., 2002
Microprocess. Microsystems, 2002
Unified Method for Optimization of Several Video Coding Algorithms on General-Purpose Processors.
Proceedings of the 2002 International Symposium on Information Technology (ITCC 2002), 2002
Proceedings of the IEEE 5th Workshop on Multimedia Signal Processing, 2002
2001
Comput. Networks, 2001
Proceedings of the IEEE International Conference on Acoustics, 2001
2000
Performance of an advanced video codec on a general-purpose processor with media ISA extensions.
IEEE Trans. Consumer Electron., 2000
1998
Proceedings of the 6th ACM International Conference on Multimedia '98, 1998