Vikram Jain

According to our database, Vikram Jain authored at least 17 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Design Approach for Die-to-Die Interfaces to Enable Energy-Efficient Chiplet Systems.

Vikram Jain, Wei Tang, Zuoguo Wu, Viansa Schmulbach, Yakun Sophia Shao, Zhengya Zhang, Borivoje Nikolic

Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, 2024

Enabling Efficient Hardware Acceleration of Hybrid Vision Transformer (ViT) Networks at the Edge.

Joren Dumoulin, Pouya Houshmand, Vikram Jain, Marian Verhelst

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

BitWave: Exploiting Column-Based Bit-Level Sparsity for Deep Learning Acceleration.

Man Shi, Vikram Jain, Antony Joseph, Maurice Meijer, Marian Verhelst

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023

TinyVers: A Tiny Versatile System-on-Chip With State-Retentive eMRAM for ML Inference at the Extreme Edge.

Vikram Jain, Juan Sebastian Piedrahita Giraldo, Jaro De Roose, Linyan Mei, Bert Boons, Marian Verhelst

IEEE J. Solid State Circuits, 2023

DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge.

Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst

IEEE J. Solid State Circuits, 2023

PetaOps/W edge-AI $\mu$ Processors: Myth or reality?

Manil Dev Gomony, Floran de Putter, Anteneh Gebregiorgis, Gianna Paulin, Linyan Mei, Vikram Jain, Said Hamdioui, Victor Sanchez, Tobias Grosser, Marc Geilen, Marian Verhelst, Friedemann Zenke, Frank K. Gürkaynak, Barry de Bruin, Sander Stuijk, Simon Davidson, Sayandip De, Mounir Ghogho, Alexandra Jimborean, Sherif Eissa, Luca Benini, Dimitrios Soudris, Rajendra Bishnoi, Sam Ainsworth, Federico Corradi, Ouassim Karrakchou, Tim Güneysu, Henk Corporaal

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge.

Vikram Jain, Matheus A. Cavalcante, Nazareno Bruschi, Michael Rogenmoser, Thomas Benz, Andreas Kurth, Davide Rossi, Luca Benini, Marian Verhelst

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Enabling real-time object detection on low cost FPGAs.

Vikram Jain, Ninad Jadhav, Marian Verhelst

J. Real Time Image Process., 2022

CONVOLVE: Smart and seamless design of smart edge processors.

Manil Dev Gomony, Floran de Putter, Anteneh Gebregiorgis, Gianna Paulin, Linyan Mei, Vikram Jain, Said Hamdioui, Victor Sanchez, Tobias Grosser, Marc Geilen, Marian Verhelst, Frank K. Zenke, Frank K. Gürkaynak, Barry de Bruin, Sander Stuijk, Simon Davidson, Sayandip De, Mounir Ghogho, Alexandra Jimborean, Sherif Eissa, Luca Benini, Dimitrios Soudris, Rajendra Bishnoi, S. Ainsworth, Federico Corradi, Ouassim Karrakchou, Tim Güneysu, Henk Corporaal

CoRR, 2022

TinyVers: A 0.8-17 TOPS/W, 1.7 μW-20 mW, Tiny Versatile System-on-chip with State-Retentive eMRAM for Machine Learning Inference at the Extreme Edge.

Vikram Jain, Juan Sebastian Piedrahita Giraldo, Jaro De Roose, Bert Boons, Linyan Mei, Marian Verhelst

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC.

Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian Piedrahita Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021

Efficient Execution of Temporal Convolutional Networks for Embedded Keyword Spotting.

Juan Sebastian Piedrahita Giraldo, Vikram Jain, Marian Verhelst

IEEE Trans. Very Large Scale Integr. Syst., 2021

Variable-Rate VLSI Architecture for 400-Gb/s Hard-Decision Product Decoder.

Vikram Jain, Christoffer Fougstedt, Per Larsson-Edefors

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators.

Linyan Mei, Pouya Houshmand, Vikram Jain, Juan Sebastian Piedrahita Giraldo, Marian Verhelst

IEEE Trans. Computers, 2021

Analyzing the Energy-Latency-Area-Accuracy Trade-off Across Contemporary Neural Networks.

Vikram Jain, Linyan Mei, Marian Verhelst

Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020

ZigZag: A Memory-Centric Rapid DNN Accelerator Design Space Exploration Framework.

Linyan Mei, Pouya Houshmand, Vikram Jain, Juan Sebastian Piedrahita Giraldo, Marian Verhelst

CoRR, 2020

2019

Variable-Rate FEC Decoder VLSI Architecture for 400G Rate-Adaptive Optical Communication.

Vikram Jain, Christoffer Fougstedt, Per Larsson-Edefors

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019