Vikas Vijayvargiya

According to our database, Vikas Vijayvargiya authored at least 9 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Performance Comparison of Nanosheet FET, CombFET, and TreeFET: Device and Circuit Perspective.

Aruna Kumari Neelam, V. Bharath Sreenivasulu, Vikas Vijayvargiya, Abhishek Kumar Upadhyay, J. Ajayan, M. Uma

IEEE Access, 2024

2019

An Auto-Calibrated Sense Amplifier with Offset Prediction Approach for Energy-Efficient SRAM.

Bhupendra Singh Reniwal, Vikas Vijayvargiya, Pooran Singh, Nand Kishor Yadav, Santosh Kumar Vishvakarma, Devesh Dwivedi

Circuits Syst. Signal Process., 2019

2018

Ultra low power-high stability, positive feedback controlled (PFC) 10T SRAM cell for look up table (LUT) design.

Pooran Singh, Bhupendra Singh Reniwal, Vikas Vijayvargiya, V. Sharma, Santosh Kumar Vishvakarma

Integr., 2018

2017

Dynamic Feedback Controlled Static Random Access Memory for Low Power Applications.

Pooran Singh, Bhupendra Singh Reniwal, Vikas Vijayvargiya, V. Sharma, Santosh Kumar Vishvakarma

J. Low Power Electron., 2017

A New Sense Amplifier Design with Improved Input Referred Offset Characteristics for Energy-Efficient SRAM.

Bhupendra Singh Reniwal, P. Singh, Vikas Vijayvargiya, Santosh Kumar Vishvakarma

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

2016

Ultra-Fast Current Mode Sense Amplifier for Small \(I_{\mathrm{CELL}}\) SRAM in FinFET with Improved Offset Tolerance.

Bhupendra Singh Reniwal, Vikas Vijayvargiya, Santosh Kumar Vishvakarma, Devesh Dwivedi

Circuits Syst. Signal Process., 2016

Investigation of DC Characteristic on DG-Tunnel FET with High-K Dielectric Using Distinct Device Parameter.

Shraddha Thakre, Ankur Beohar, Vikas Vijayvargiya, Nandakishor Yadav, Santosh Kumar Vishvakarma

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016

2015

Effect of Gate and Channel Engineering on Digital Performance Parameters Using Tied (3T) and Independent (4T) Double Gate MOSFETs.

Neha Jagwani, Vikas Vijayvargiya, Santosh Kumar Vishvakarma

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2015

Dataline Isolated Differential Current Feed/Mode Sense Amplifier for Small I_cell SRAM Using FinFET.

Bhupendra Singh Reniwal, Vikas Vijayvargiya, Pooran Singh, Santosh Kumar Vishvakarma, Devesh Dwivedi

Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015