Vikas S. Vij

According to our database1, Vikas S. Vij authored at least 8 papers between 2009 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2016
Timing Path-Driven Cycle Cutting for Sequential Controllers.
ACM Trans. Design Autom. Electr. Syst., 2016

2014
Interfacing Synchronous and Asynchronous Domains for Open Core Protocol.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

2013
Automatic addition of reset in asynchronous sequential control circuits.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

A low power UART design based on asynchronous techniques.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Design of low energy, high performance synchronous and asynchronous 64-point FFT.
Proceedings of the Design, Automation and Test in Europe, 2013

SAS: Source Asynchronous Signaling Protocol for Asynchronous Handshake Communication Free from Wire Delay Overhead.
Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

2009
The Future of Formal Methods and GALS Design.
Proceedings of the 4th International Workshop on the Application of Formal Methods for Globally Asynchronous and Locally Synchronous Design, 2009

Characterization of Asynchronous Templates for Integration into Clocked CAD Flows.
Proceedings of the 15th IEEE Symposium on Asynchronous Circuits and Systems, 2009


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