Vikas Pokala

According to our database, Vikas Pokala authored at least 2 papers between 2007 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2008

Soft-error resilience of the IBM POWER6 processor input/output subsystem.

Carl A. Bender, Pia N. Sanda, Prabhakar Kudva, Ricardo Mata, Vikas Pokala, Ryan Haraden, Matthew Schallhorn

IBM J. Res. Dev., 2008

2007

A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor.

Alan J. Drake, Robert M. Senger, Harmander Deogun, Gary D. Carpenter, Soraya Ghiasi, Tuyet Nguyen, Norman K. James, Michael S. Floyd, Vikas Pokala

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007