Vikas Mahor

According to our database, Vikas Mahor authored at least 11 papers between 2011 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

Image Filtering with Iterative Wavelet Transform Based Compression.

Vikas Mahor, Srishti Agrawal, Rekha Gupta

Proceedings of the Advances in Computing and Data Sciences, 2019

2018

A State-of-the-Art Current Mirror-Based Reliable Wide Fan-in FinFET Domino OR Gate Design.

Vikas Mahor, Manisha Pattanaik

Circuits Syst. Signal Process., 2018

A Highly Accurate Fire Detection Method Using Discriminate Method.

Shubhranil Kundu, Vikas Mahor, Rekha Gupta

Proceedings of the 2018 International Conference on Advances in Computing, 2018

2017

An Aging-Aware Reliable FinFET-Based Low-Power 32-Word \(\times \) 32-bit Register File.

Vikas Mahor, Manisha Pattanaik

Circuits Syst. Signal Process., 2017

2016

Novel Ultra Low Leakage FinFET Based SRAM Cell.

Vivek Kumar, Vikas Mahor, Manisha Pattanaik

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016

FinFET-Based Low Power Address Decoder under Process Variation.

Mukesh Chaturvedi, Akanksha Bhadoria, Vikas Mahor, Manisha Pattanaik

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016

Low Stand-By Power and Process Variation Tolerant FinFET Based SRAM Cell.

Akanksha Bhadoria, Mukesh Chaturvedi, Vikas Mahor, Manisha Pattanaik

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016

2015

Novel NBTI Aware Approach for Low Power FinFET Based Wide Fan-In Domino Logic.

Vikas Mahor, Manisha Pattanaik

J. Low Power Electron., 2015

Low Leakage and Highly Noise Immune FinFET-Based Wide Fan-In Dynamic Logic Design.

Vikas Mahor, Manisha Pattanaik

J. Circuits Syst. Comput., 2015

2012

A Process Variation Tolerant Low Contention Keeper Design for Wide Fan-In Dynamic OR Gate.

Vikas Mahor, Akanksha Chouhan, Manisha Pattanaik

Proceedings of the International Symposium on Electronic System Design, 2012

2011

A Novel Low Power Noise Tolerant High Performance Dynamic Feed through Logic Design Technique.

Manisha Pattanaik, Shashank Parashar, Chaudhry Indra Kumar, Akanksha Chouhan, Vikas Mahor

Proceedings of the International Symposium on Electronic System Design, 2011