Vijay Sundaresan
Orcid: 0009-0006-9342-4356Affiliations:
- IBM Toronto Lab, Canada
According to our database1,
Vijay Sundaresan
authored at least 30 papers
between 1999 and 2024.
Collaborative distances:
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Bibliography
2024
The ART of Sharing Points-to Analysis: Reusing Points-to Analysis Results Safely and Efficiently.
Proc. ACM Program. Lang., 2024
Proc. ACM Program. Lang., 2024
Proceedings of the IEEE International Conference on Software Testing, Verification and Validation, ICST 2024, 2024
Identification of Java lock contention anti-patterns based on run-time performance data.
Proceedings of the 5th ACM/IEEE International Conference on Automation of Software Test (AST 2024), 2024
2023
Proceedings of the 45th IEEE/ACM International Conference on Software Engineering: Software Engineering in Practice, 2023
Proceedings of the International Conference on Machine Learning and Applications, 2023
2022
Proceedings of the 2022 USENIX Annual Technical Conference, 2022
Proceedings of the Runtime Verification - 22nd International Conference, 2022
Proceedings of the IEEE International Conference on Software Maintenance and Evolution, 2022
Proceedings of the 32nd Annual International Conference on Computer Science and Software Engineering, 2022
2021
Proceedings of the CASCON '21: Proceedings of the 31st Annual International Conference on Computer Science and Software Engineering, Toronto, Ontario, Canada, November 22, 2021
2020
Proceedings of the CASCON '20: Proceedings of the 30th Annual International Conference on Computer Science and Software Engineering, Toronto, Ontario, Canada, November 10, 2020
2018
Proceedings of the 28th Annual International Conference on Computer Science and Software Engineering, 2018
2017
Proceedings of the 27th Annual International Conference on Computer Science and Software Engineering, 2017
2013
Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization, 2013
2011
Proceedings of the Center for Advanced Studies on Collaborative Research, 2011
2010
Proceedings of the 2010 conference of the Centre for Advanced Studies on Collaborative Research, 2010
2009
Proceedings of the 2009 conference of the Centre for Advanced Studies on Collaborative Research, 2009
2008
Reduced Complementary Dynamic and Differential Logic: A CMOS Logic Style for DPA-Resistant Secure IC Design.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
Proceedings of the Sixth International Symposium on Code Generation and Optimization (CGO 2008), 2008
2007
Power invariant secure IC design methodology using reduced complementary dynamic and differential logic.
Proceedings of the IFIP VLSI-SoC 2007, 2007
2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Experiences with Multi-threading and Dynamic Class Loading in a Java Just-In-Time Compiler.
Proceedings of the Fourth IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2006), 2006
2005
Automatically Reducing Repetitive Synchronization with a Just-in-Time Compiler for Java.
Proceedings of the 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 2005
2004
Java Just-in-Time Compiler and Virtual Machine Improvements for Server and Middleware Applications.
Proceedings of the 3rd Virtual Machine Research and Technology Symposium, 2004
2000
Proceedings of the 2000 ACM SIGPLAN Conference on Object-Oriented Programming Systems, 2000
Proceedings of the Compiler Construction, 9th International Conference, 2000
1999
Proceedings of the 1999 conference of the Centre for Advanced Studies on Collaborative Research, 1999