Vijay Raghunat

According to our database, Vijay Raghunat authored at least 1 paper in 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

An efficient chip-level time slack allocation algorithm for Dual-Vdd FPGA power reduction.

Yan Lin, Yu Hu, Lei He, Vijay Raghunat

Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006