Vijay Degalahal

According to our database, Vijay Degalahal authored at least 14 papers between 2002 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2009

Compiler-assisted soft error detection under performance and energy constraints in embedded systems.

Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin

ACM Trans. Embed. Comput. Syst., 2009

Modeling Soft Errors at the Device and Logic Levels for Combinational Circuits.

Rajaraman Ramanarayanan, Vijay Degalahal, Krishnan Ramakrishnan, Jungsub Kim, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Kenan Unlu

IEEE Trans. Dependable Secur. Comput., 2009

2007

Compiler-Directed Code Restructuring for Operating with Compressed Arrays.

Taylan Yemliha, Guangyu Chen, Ozcan Ozturk, Mahmut T. Kandemir, Vijay Degalahal

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Enhancing Locality in Two-Dimensional Space through Integrated Computation and Data Mappings.

Mahmut T. Kandemir, Ozcan Ozturk, Vijay Degalahal

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

2006

A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks.

Thomas D. Richardson, Chrysostomos Nicopoulos, Dongkook Park, Narayanan Vijaykrishnan, Yuan Xie, Chita R. Das, Vijay Degalahal

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

2005

Soft errors issues in low-power caches.

Vijay Degalahal, Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin

IEEE Trans. Very Large Scale Integr. Syst., 2005

Compiler-Directed Instruction Duplication for Soft Error Detection.

Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin

Proceedings of the 2005 Design, 2005

Methodology for high level estimation of FPGA power consumption.

Vijay Degalahal, Tim Tuan

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Reducing instruction cache energy consumption using a compiler-based strategy.

Wei Zhang, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin

ACM Trans. Archit. Code Optim., 2004

The Effect of Threshold Voltages on the Soft Error Rate.

Vijay Degalahal, Rajaraman Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin

Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

Soft error and energy consumption interactions: a data cache perspective.

Lin Li, Vijay Degalahal, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

2003

Analyzing Soft Errors in Leakage Optimized SRAM Design.

Vijay Degalahal, Narayanan Vijaykrishnan, Mary Jane Irwin

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Effect of Power Optimizations on Soft Error Rate.

Vijay Degalahal, Rajaraman Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin

Proceedings of the VLSI-SOC: From Systems to Chips, 2003

2002

Compiler-directed instruction cache leakage optimization.

Wei Zhang, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin

Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002