Víctor M. Brea
Orcid: 0000-0003-0078-0425Affiliations:
- University of Santiago de Compostela, CiTIUS, Spain
According to our database1,
Víctor M. Brea
authored at least 111 papers
between 1998 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Global shutter CMOS vision sensors and event cameras for on-chip dynamic information.
Int. J. Circuit Theory Appl., June, 2024
IEEE Trans. Computational Imaging, 2024
CoRR, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
Pattern Recognit., 2023
A full data augmentation pipeline for small object detection based on generative adversarial networks.
Pattern Recognit., 2023
CoRR, 2023
Spatiotemporal tubelet feature aggregation and object linking for small object detection in videos.
Appl. Intell., 2023
CDS Free Frame Differencing Event Vision Pixel with Lateral Overflow Capacitor for Dynamic Range Extension.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
Proceedings of the Pattern Recognition and Image Analysis - 11th Iberian Conference, 2023
Proceedings of the Computer Analysis of Images and Patterns, 2023
2022
An 11 mA Capacitor-Less LDO With 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Pattern Recognit., 2022
Low-cost mobile mapping system solution for traffic sign segmentation using Azure Kinect.
Int. J. Appl. Earth Obs. Geoinformation, 2022
A 2-Tap Macro-Pixel-Based Indirect ToF CMOS Image Sensor for Multi-Frequency Demodulation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Design of a 5-bit Signed SRAM-based In-Memory Computing Cell for Deep Learning Models.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
HDC8192: A General Purpose Mixed-Signal CMOS Architecture for Massively Parallel Hyperdimensional Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 26th International Conference on Pattern Recognition, 2022
2HDED: Net for Joint Depth Estimation and Image Deblurring from a Single Out-of-Focus Image.
Proceedings of the 2022 IEEE International Conference on Image Processing, 2022
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
Low-Power Techniques on a CMOS Vision Sensor Chip for Event Generation by Frame Differencing with High Dynamic Range.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
A General-Purpose CMOS Vision Sensor with In-Pixel 5-bit Convolutional Layer Computation.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
2021
Pattern Recognit., 2021
Short-term anchor linking and long-term self-guided attention for video object detection.
Image Vis. Comput., 2021
IEEE Internet Things J., 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Proceedings of the 28th IEEE International Conference on Electronics, 2021
Proceedings of the Computer Analysis of Images and Patterns, 2021
2020
On-Chip Solar Energy Harvester and PMU With Cold Start-Up and Regulated Output Voltage for Biomedical Applications.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
J. Real Time Image Process., 2020
J. Real Time Image Process., 2020
Eng. Appl. Artif. Intell., 2020
1.88 nA Quiescent Current Capacitor-Less LDO with Adaptive Biasing Based on a SSF Absolute Voltage Difference Meter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 25th International Conference on Pattern Recognition, 2020
Proceedings of the 25th International Conference on Pattern Recognition, 2020
Proceedings of the ECAI 2020 - 24th European Conference on Artificial Intelligence, 29 August-8 September 2020, Santiago de Compostela, Spain, August 29 - September 8, 2020, 2020
2019
Deep Learning-Based Multiple Object Visual Tracking on Embedded System for IoT and Mobile Edge Computing Applications.
IEEE Internet Things J., 2019
Ultralow power voltage reference circuit for implantable devices in standard CMOS technology.
Int. J. Circuit Theory Appl., 2019
Eng. Appl. Artif. Intell., 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
On-Chip Solar Cell and PMU on the Same Substrate with Cold Start-Up from nW and 80 dB of Input Power Range for Biomedical Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Live Demonstration: Deep Learning-Based Visual Tracking of Multiple Objects on a Low-Power Embedded System.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830μm<sup>2</sup> Subthreshold Voltage Reference for Implantable Devices.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the Pattern Recognition and Image Analysis - 9th Iberian Conference, 2019
Proceedings of the Computer Analysis of Images and Patterns, 2019
2018
Special issue on advances on smart camera architectures for real-time image processing.
J. Real Time Image Process., 2018
Pulsed time-of-flight pixel with on-chip 20 klux background light suppression in standard CMOS technology.
Int. J. Circuit Theory Appl., 2018
In-pixel analog memories for a pixel-based background subtraction algorithm on CMOS vision sensors.
Int. J. Circuit Theory Appl., 2018
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018
Impact of Analog Memories Non-Idealities on the Performance of Foreground Detection Algorithms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Live Demonstration: Light Energy Harvesting System with an On-Chip Solar Cell and Cold Start-Up.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Results of 'iCaveats', a Project on the Integration of Architectures and Components for Embedded Vision.
Proceedings of the 12th International Conference on Distributed Smart Cameras, 2018
Live Demonstration: Deep Learning-Based Multiple Object Detection and Tracking on a Low-Power Embedded System.
Proceedings of the 12th International Conference on Distributed Smart Cameras, 2018
Proceedings of the British Machine Vision Conference 2018, 2018
2017
IEEE J. Solid State Circuits, 2017
Effect of temporal and spatial noise on the performance of hardware oriented background extraction algorithms.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017
Proceedings of the Image Sensors and Imaging Systems 2017, 2017
2016
PRECISION: A Reconfigurable SIMD/MIMD Coprocessor for Computer Vision Systems-on-Chip.
IEEE Trans. Computers, 2016
Dynamic joint model of capacitive charge pumps and on-chip photovoltaic cells for CMOS micro-energy harvesting.
Int. J. Circuit Theory Appl., 2016
Time-of-flight chip in standard CMOS technology with in-pixel adaptive number of accumulations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
Sensors, 2015
Proceedings of the IEEE Sensors Applications Symposium, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Dark current optimization of 4-transistor pixel topologies in standard CMOS technologies for time-of-flight sensors.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Mask and maskless face classification system to detect breach protocols in the operating room.
Proceedings of the 9th International Conference on Distributed Smart Camera, 2015
Proceedings of the Pattern Recognition and Image Analysis - 7th Iberian Conference, 2015
2014
Split and shift methodology on cellular processor arrays: area saving versus time penalty.
Int. J. Circuit Theory Appl., 2014
Form factor improvement of smart-pixels for vision sensors through 3-D vertically-integrated technologies.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
Proceedings of the ESSCIRC 2014, 2014
2013
A hierarchical vision processing architecture oriented to 3D integration of smart camera chips.
J. Syst. Archit., 2013
Proceedings of the 20th IEEE International Conference on Electronics, 2013
A 176×120 pixel CMOS vision chip for Gaussian filtering with massivelly Parallel CDS and A/D-conversion.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
2012
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops, 2012
SIMD/MIMD Dynamically-Reconfigurable Architecture for High-Performance Embedded Vision Systems.
Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012
2011
Performance analysis of massively parallel embedded hardware architectures for retinal image processing.
EURASIP J. Image Video Process., 2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
A CMOS-3D reconfigurable architecture with in-pixel processing for feature detectors.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
2010
Proceedings of the IEEE International Conference on 3D System Integration, 2010
2009
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
EURASIP J. Adv. Signal Process., 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
An efficient FPGA implementation of a DT-CNN for small image gray-scale pre-processing.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
2007
CNN Implementation of Spin Filters for Electronic Speckle Pattern Interferometry Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
Relating Cellular Non-linear Networks to Threshold Logic and Single Instruction Multiple Data computing models.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
Int. J. Circuit Theory Appl., 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
A one-quadrant discrete-time cellular neural network architecture for pixel-level snakes: B/W processing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
A one-quadrant discrete-time cellular neural network CMOS chip for pixel-level snakes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
2004
Design of the processing core of a mixed-signal CMOS DTCNN chip for pixel-level snakes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
A mixed-signal CMOS DTCNN chip for pixel-level snakes.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
Image Vis. Comput., 2003
Proceedings of the Pattern Recognition and Image Analysis, First Iberian Conference, 2003
2002
Int. J. Circuit Theory Appl., 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2000
Proceedings of the 15th International Conference on Pattern Recognition, 2000
1998
Pattern Recognit. Lett., 1998
An analog CMOS realisation of a reconfigurable discrete-time cellular neural network.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998