Victor C. Y. Chang

According to our database, Victor C. Y. Chang authored at least 4 papers between 2007 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Systolic Building Block for Logic-on-Logic 3D-IC Implementations of Convolutional Neural Networks.

H. T. Kung, Bradley McDanel, Sai Qian Zhang, C. T. Wang, Jin Cai, C. Y. Chen, Victor C. Y. Chang, M. F. Chen, Jack Yuan-Chen Sun, Douglas Yu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2015

Accurate 3-D capacitance extractions for advanced nanometer CMOS nodes.

Keh-Jeng Chang, Shih-Hao Lee, Kuo-Fu Lee, Ping-Hung Yuh, Ho-Che Yu, Wen-Cheng Huang, Victor C. Y. Chang

Proceedings of the VLSI Design, Automation and Test, 2015

Power saving and noise reduction of 28nm CMOS RF system integration using integrated fan-out wafer level packaging (InFO-WLP) technology.

Chuei-Tang Wang, Jeng-Shien Hsieh, Victor C. Y. Chang, En-Hsiang Yeh, Feng-Wei Kuo, Hsu-Hsien Chen, Chih-Hua Chen, Huan-Neng Ron Chen, Ying-Ta Lu, Chewnpu Jou, Hao-Yi Tsai, C. S. Liu, Doug C. H. Yu

Proceedings of the 2015 International 3D Systems Integration Conference, 2015

2007

Modeling Sub-90nm On-Chip Variation Using Monte Carlo Method for DFM.

Jun-Fu Huang, Victor C. Y. Chang, Sally Liu, Kelvin Y. Y. Doong, Keh-Jeng Chang

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007