Victor Adler

According to our database, Victor Adler authored at least 5 papers between 1998 and 2002.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2002

Demonstration of Speed and Power Enhancements on an Industrial Circuit Through Application of Clock Skew Scheduling.

Dimitrios Velenis, Kevin T. Tang, Ivan S. Kourtev, Victor Adler, Franklin Baez, Eby G. Friedman

J. Circuits Syst. Comput., 2002

2001

The first MAJC microprocessor: a dual CPU system-on-a-chip.

Andre Kowalczyk, Victor Adler, Chaim Amir, Frank Chiu, Choon Ping Chng, Willem J. de Lange, Yuefei Ge, Subhendra Ghosh, Tan Canh Hoang, Baoqing Huang, Shree Kant, Y. S. Kao, Cong Khieu, Suresh Kumar, Lan Lee, Avi Liebermensch, Xin Liu, Naveen G. Malur, Albert A. Martin, Hiep Ngo, Sung-Hun Oh, Ioannis Orginos, Lorraine Shih, Balmiki Sur, Marc Tremblay, Allan Tzeng, Dan Vo, Sanjay Zambare, Jin Zong

IEEE J. Solid State Circuits, 2001

Demonstration of speed enhancements on an industrial circuit through application of non-zero clock skew scheduling.

Dimitrios Velenis, Kevin T. Tang, Ivan S. Kourtev, Victor Adler, Franklin Baez, Eby G. Friedman

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

1999

Exploiting hysteresis in a CMOS buffer.

Radu M. Secareanu, Victor Adler, Eby G. Friedman

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1998

A repeater timing model and insertion algorithm to reduce delay in RC tree structures.

Victor Adler, Eby G. Friedman

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998