Victor A. Ying

Orcid: 0000-0001-9660-7082

According to our database1, Victor A. Ying authored at least 6 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Accelerating RTL Simulation with Hardware-Software Co-Design.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

2021
Taming the Zoo: The Unified GraphIt Compiler Framework for Novel Architectures.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2020
T4: Compiling Sequential Code for Effective Speculative Parallelization in Hardware.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2019
Timeloop: A Systematic Approach to DNN Accelerator Evaluation.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019

2018
Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

2017
Fractal: An Execution Model for Fine-Grain Nested Speculative Parallelism.
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017


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