Vicent Selfa
Orcid: 0000-0002-9732-4831
According to our database1,
Vicent Selfa
authored at least 11 papers
between 2015 and 2020.
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Bibliography
2020
Phase-Aware Cache Partitioning to Target Both Turnaround Time and System Performance.
IEEE Trans. Parallel Distributed Syst., 2020
2018
J. Parallel Distributed Comput., 2018
Improving System Turnaround Time with Intel CAT by Identifying LLC Critical Applications.
Proceedings of the Euro-Par 2018: Parallel Processing, 2018
2017
A Hardware Approach to Fairly Balance the Inter-Thread Interference in Shared Caches.
IEEE Trans. Parallel Distributed Syst., 2017
A research-oriented course on Advanced Multicore Architecture: Contents and active learning methodologies.
J. Parallel Distributed Comput., 2017
Application Clustering Policies to Address System Fairness with Intel's Cache Allocation Technology.
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017
2016
Proceedings of the 24th Euromicro International Conference on Parallel, 2016
Student Research Poster: A Low Complexity Cache Sharing Mechanism to Address System Fairness.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016
2015
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015