Venu Birudu

According to our database, Venu Birudu authored at least 4 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Negative Capacitance FET 8T SRAM Computing in-Memory based Logic Design for Energy Efficient AI Edge Devices.

Venu Birudu, Tirumalarao Kadiyam, Koteswararao Penumalli, Aditya Japa, Sushma Nirmala Sambatur, Chongyan Gu, Siva Sankar Yellampalli, Ramesh Vaddi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks.

Venu Birudu, Siva Sankar Yellampalli, Ramesh Vaddi

Microelectron. J., September, 2023

2022

Design and Exploration of Negative Capacitance FETs for Energy Efficient SRAM based In-Memory XNOR/Input and Weight Product Operation for Deep Neural Networks.

Venu Birudu, Siva Sankar Yellampalli, Ramesh Vaddi

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

2021

Design and Analysis of 4-bit and 5-bit Flash ADC's in 90nm CMOS Technology for Energy Efficient IoT Applications.

Varanasi Koundinya, Madanu Karun Chand, Dharmavarapu Dhushyanth, Devarajugattu Jayanth Saikumar, Arumalla Varun Sai, Venu Birudu, Ramesh Vaddi

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021