Venkatraman Govindaraju

According to our database1, Venkatraman Govindaraju authored at least 12 papers between 2008 and 2022.

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Bibliography

2022

2017
A many-core architecture for in-memory data processing.
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Big Data Processing: Scalability with Extreme Single-Node Performance.
Proceedings of the 2017 IEEE International Congress on Big Data, 2017

2015
A Graph-Based Program Representation for Analyzing Hardware Specialization Approaches.
IEEE Comput. Archit. Lett., 2015

Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation.
Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

2013
Breaking SIMD shackles with an exposed flexible microarchitecture and the access execute PDG.
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012
DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing.
IEEE Micro, 2012

Design, integration and implementation of the DySER hardware accelerator into OpenSPARC.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

Prototyping the DySER specialization architecture with OpenSPARC.
Proceedings of the 2012 IEEE Hot Chips 24 Symposium (HCS), 2012

2011
Sampling + DMR: practical and low-overhead permanent fault detection.
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

Dynamically Specialized Datapaths for energy efficient computing.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

2008
Toward a multicore architecture for real-time ray-tracing.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008


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