Venkata Yaswanth Raparti

According to our database, Venkata Yaswanth Raparti authored at least 8 papers between 2016 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

Approximate NoC and Memory Controller Architectures for GPGPU Accelerators.

Venkata Yaswanth Raparti, Sudeep Pasricha

IEEE Trans. Parallel Distributed Syst., 2020

2019

Lightweight Mitigation of Hardware Trojan Attacks in NoC-based Manycore Computing.

Venkata Yaswanth Raparti, Sudeep Pasricha

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

RAPID: Memory-Aware NoC for Latency Optimized GPGPU Architectures.

Venkata Yaswanth Raparti, Sudeep Pasricha

IEEE Trans. Multi Scale Comput. Syst., 2018

DAPPER: Data Aware Approximate NoC for GPGPU Architectures.

Venkata Yaswanth Raparti, Sudeep Pasricha

Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018

PARM: power supply noise aware resource management for NoC based multicore systems in the dark silicon era.

Venkata Yaswanth Raparti, Sudeep Pasricha

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

ARTEMIS: An Aging-Aware Runtime Application Mapping Framework for 3D NoC-Based Chip Multiprocessors.

Venkata Yaswanth Raparti, Nishit Ashok Kapadia, Sudeep Pasricha

IEEE Trans. Multi Scale Comput. Syst., 2017

2016

Memory-aware circuit overlay NoCs for latency optimized GPGPU architectures.

Venkata Yaswanth Raparti, Sudeep Pasricha

Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

CHARM: A checkpoint-based resource management framework for reliable multicore computing in the dark silicon era.

Venkata Yaswanth Raparti, Nishit Ashok Kapadia, Sudeep Pasricha

Proceedings of the 34th IEEE International Conference on Computer Design, 2016