Venkata Appa Rao Yempada

According to our database, Venkata Appa Rao Yempada authored at least 2 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2024

>Optimization of CMOS compatible non-perovskite ferroelectric gate stack for designing low power Ferroelectric tunnel FETs.

Venkata Appa Rao Yempada, Srivatsava Jandhyala, Janamani Chandram Ayyangalam

Proceedings of the 28th International Symposium on VLSI Design and Test, 2024

2019

Simulation Study of III-V Lateral Tunnel FETs with Gate-Drain Underlap.

Venkata Appa Rao Yempada, Srivatsava Jandhyala

Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019