Veepsa Bhatia

Orcid: 0000-0002-9102-2752

According to our database1, Veepsa Bhatia authored at least 4 papers between 2012 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2018
Design of an SCL logic based Current Comparator.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2017
Modified Tang and Pun's Current Comparator and Its Application to Full Flash and Two-Step Flash Current Mode ADCs.
J. Electr. Comput. Eng., 2017

2016
A Novel Ultra Low Power Current Comparator.
Proceedings of the Advances in Computing and Data Sciences, 2016

2012
An expandable current-mode ADC with power optimization technique.
Proceedings of the 1st International Conference on Recent Advances in Information Technology, 2012


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