Vazgen Melikyan
According to our database1,
Vazgen Melikyan
authored at least 45 papers
between 2008 and 2024.
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Bibliography
2024
AMBEATion: Analog Mixed-Signal Back-End Design Automation with Machine Learning and Artificial Intelligence Techniques.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
2023
Smart Adjustment Of Transistor Parameters To Reduce Temperature Rise Due To Self-Heating Effect.
Proceedings of the IEEE East-West Design & Test Symposium, 2023
Proceedings of the IEEE East-West Design & Test Symposium, 2023
Proceedings of the IEEE East-West Design & Test Symposium, 2023
Accelerating CNN Models for Visual Odometry: Design and FPGA Implementation for Efficient Hardware Acceleration.
Proceedings of the IEEE East-West Design & Test Symposium, 2023
2021
Enhanced pin-access prediction and design optimization with machine learning integration.
Microelectron. J., 2021
Proceedings of the IEEE East-West Design & Test Symposium, 2021
Proceedings of the IEEE East-West Design & Test Symposium, 2021
2019
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019
Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019
2018
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018
Low Power, Low Offset, Area Efficient Comparator Design in Nanoscale CMOS Technology.
Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018
2017
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017
Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017
2016
Line-impedance matching and signal conditioning capabilities for high-speed feed-forward voltage-mode transmit drivers.
Microelectron. J., 2016
Low power OpenRISC processor with power gating, multi-VTH and multi-voltage techniques.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016
Analysis of the impact of metastability phenomenon on the latency and power consumption of synchronizer circuits.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016
2015
Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015
Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015
Clock gating and multi-VTH low power design methods based on 32/28 nm ORCA processor.
Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015
2014
Proceedings of the 2014 IEEE International Conference on IC Design & Technology, 2014
Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014
Proceedings of the 2014 East-West Design & Test Symposium, 2014
Proceedings of the 2014 East-West Design & Test Symposium, 2014
Design of low-ripple multi-topology step-down switched capacitor power converter with adaptive control system.
Proceedings of the 2014 East-West Design & Test Symposium, 2014
2013
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
Proceedings of the East-West Design & Test Symposium, 2013
Proceedings of the East-West Design & Test Symposium, 2013
Low-voltage compatible linear voltage ramp generator for zero-crossing-based integrators.
Proceedings of the East-West Design & Test Symposium, 2013
Proceedings of the East-West Design & Test Symposium, 2013
Proceedings of the East-West Design & Test Symposium, 2013
2012
Investigating the effects of Inverted Temperature Dependence (ITD) on clock distribution networks.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
Proceedings of the 6th IEEE International Design and Test Workshop, 2011
Proceedings of the 9th East-West Design & Test Symposium, 2011
2010
5V tolerant power clamps for mixed-voltage IC's in 65nm 2.5V salicided CMOS technology.
Proceedings of the 2010 East-West Design & Test Symposium, 2010
Proceedings of the 2010 East-West Design & Test Symposium, 2010
Proceedings of the 2010 East-West Design & Test Symposium, 2010
Schematic protection method from influence of total ionization dose effects on threshold voltage of MOS transistors.
Proceedings of the 2010 East-West Design & Test Symposium, 2010
2009
Full-custom design project for digital VLSI and IC design courses using synopsys generic 90nm CMOS library.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2009
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2009
2008
Proceedings of the 2008 East-West Design & Test Symposium, 2008