Vasilis N. Thanasoulis

According to our database1, Vasilis N. Thanasoulis authored at least 10 papers between 2006 and 2021.

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Bibliography

2021
Delay-Based Neural Computation: Pulse Routing Architecture and Benchmark Application in FPGA.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

2017
Pattern representation and recognition with accelerated analog neuromorphic systems.
CoRR, 2017



2014
A pulse communication flow ready for accelerated neuromorphic experiments.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Configurable pulse routing architecture for accelerated multi-node neuromorphic systems.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2012
Long-term pulse stimulation and recording in an accelerated neuromorphic system.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Dedicated FPGA communication architecture and design for a large-scale neuromorphic system.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2007
Server side hashing core exceeding 3 Gbps of throughput.
Int. J. Secur. Networks, 2007

2006
Temporal and System Level Modifications for High Speed VLSI Implementations of Cryptographic Core.
Proceedings of the 13th IEEE International Conference on Electronics, 2006


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