Vasileios Porpodas

According to our database1, Vasileios Porpodas authored at least 22 papers between 2007 and 2020.

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Bibliography

2020
Vectorization-aware loop unrolling with seed forwarding.
Proceedings of the CC '20: 29th International Conference on Compiler Construction, 2020

2019
ZOFI: Zero-Overhead Fault Injection Tool for Fast Transient Fault Coverage Analysis.
CoRR, 2019

PostSLP: Cross-Region Vectorization of Fully or Partially Vectorized Code.
Proceedings of the Languages and Compilers for Parallel Computing, 2019

Super-Node SLP: Optimized Vectorization for Code Sequences Containing Operators and Their Inverse Elements.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2019

2018
Look-ahead SLP: auto-vectorization in the presence of commutative operations.
Proceedings of the 2018 International Symposium on Code Generation and Optimization, 2018

VW-SLP: auto-vectorization with adaptive vector width.
Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018

2017
LLVM Compiler Implementation for Explicit Parallelization and SIMD Vectorization.
Proceedings of the Fourth Workshop on the LLVM Compiler Infrastructure in HPC, 2017

SuperGraph-SLP Auto-Vectorization.
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016
Lynx: Using OS and Hardware Support for Fast Fine-Grained Inter-Core Communication.
Proceedings of the 2016 International Conference on Supercomputing, 2016

COMET: communication-optimised multi-threaded error-detection technique.
Proceedings of the 2016 International Conference on Compilers, 2016

2015
PSLP: padded SLP automatic vectorization.
Proceedings of the 13th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2015

Throttling Automatic Vectorization: When Less is More.
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015

2013
LUCAS: latency-adaptive unified cluster assignment and instruction scheduling.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2013

Aligned Scheduling: Cache-Efficient Instruction Scheduling for VLIW Processors.
Proceedings of the Languages and Compilers for Parallel Computing, 2013

DRIFT: Decoupled CompileR-Based Instruction-Level Fault-Tolerance.
Proceedings of the Languages and Compilers for Parallel Computing, 2013

CASTED: Core-Adaptive Software Transient Error Detection for Tightly Coupled Cores.
Proceedings of the 27th IEEE International Symposium on Parallel and Distributed Processing, 2013

CAeSaR: Unified cluster-assignment scheduling and communication reuse for clustered VLIW processors.
Proceedings of the International Conference on Compilers, 2013

2012
UCIFF: Unified Cluster Assignment Instruction Scheduling and Fast Frequency Selection for Heterogeneous Clustered VLIW Cores.
Proceedings of the Languages and Compilers for Parallel Computing, 2012

Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

2010
Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy.
J. Signal Process. Syst., 2010

2009
Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse.
IET Comput. Digit. Tech., 2009

2007
Interactive presentation: A decoupled architecture of processors with scratch-pad memory hierarchy.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007


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