Vasileios Leon

Orcid: 0000-0003-0503-8246

According to our database1, Vasileios Leon authored at least 28 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
HW/SW co-design on embedded SoC FPGA for star tracking optimization in space applications.
J. Real Time Image Process., February, 2024

MPAI: A Co-Processing Architecture with MPSoC & AI Accelerators for Vision Applications in Space.
CoRR, 2024

Development of High-Performance DSP Algorithms on the European Rad-Hard NG-ULTRA SoC FPGA.
CoRR, 2024

Towards Enabling 5G-NTN Satellite Communications for Manned and Unmanned Rotary Wing Aircraft.
CoRR, 2024

2023
Accelerating AI and Computer Vision for Satellite Pose Estimation on the Intel Myriad X Embedded SoC.
Microprocess. Microsystems, 2023

Approximate Computing Survey, Part II: Application-Specific & Architectural Approximation Techniques and Applications.
CoRR, 2023

Approximate Computing Survey, Part I: Terminology and Software & Hardware Approximation Techniques.
CoRR, 2023

From Circuits to SoC Processors: Arithmetic Approximation Techniques & Embedded Computing Methodologies for DSP Acceleration.
CoRR, 2023

Increasing the Fault Tolerance of COTS FPGAs in Space: SEU Mitigation Techniques on MPSoC.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023

2022
Systematic Embedded Development and Implementation Techniques on Intel Myriad VPUs.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Combining Fault Tolerance Techniques and COTS SoC Accelerators for Payload Processing in Space.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Towards Employing FPGA and ASIP Acceleration to Enable Onboard AI/ML in Space Applications.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

MAx-DNN: Multi-Level Arithmetic Approximation for Energy-Efficient DNN Hardware Accelerators.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

2021
Improving Power of DSP and CNN Hardware Accelerators Using Approximate Floating-point Multipliers.
ACM Trans. Embed. Comput. Syst., 2021

Improving Performance-Power-Programmability in Space Avionics with Edge Devices: VBN on Myriad2 SoC.
ACM Trans. Embed. Comput. Syst., 2021

Development and Testing on the European Space-Grade BRAVE FPGAs: Evaluation of NG-Large Using High-Performance DSP Benchmarks.
IEEE Access, 2021

ApproxQAM: High-Order QAM Demodulation Circuits with Approximate Arithmetic.
Proceedings of the 10th International Conference on Modern Circuits and Systems Technologies, 2021

FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

Exploiting the Potential of Approximate Arithmetic in DSP & AI Hardware Accelerators.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

ParalOS: A Scheduling & Memory Management Framework for Heterogeneous VPUs.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

2020
Combining Arithmetic Approximation Techniques for Improved CNN Circuit Design.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019
Energy-efficient VLSI implementation of multipliers with double LSB operands.
IET Circuits Devices Syst., 2019

TF2FPGA: A Framework for Projecting and Accelerating Tensorflow CNNs on FPGA Platforms.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Cooperative Arithmetic-Aware Approximation Techniques for Energy-Efficient Multipliers.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
Approximate Hybrid High Radix Encoding for Energy-Efficient Inexact Multipliers.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Walking through the Energy-Error Pareto Frontier of Approximate Multipliers.
IEEE Micro, 2018

Efficient support vector machines implementation on Intel/Movidius Myriad 2.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

Evaluation Methodology and Reconfiguration Tests on the New European NG-MEDIUM FPGA.
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018


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