Vasileios Karakostas

Orcid: 0000-0001-5496-2430

According to our database1, Vasileios Karakostas authored at least 38 papers between 2011 and 2024.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Design, Implementation and Evaluation of the SVNAPOT Extension on a RISC-V Processor.
CoRR, 2024

Gem5-MARVEL: Microarchitecture-Level Resilience Analysis of Heterogeneous SoC Architectures.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024


BypassD: Enabling fast userspace access to shared SSDs.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023
Vitamin-V: Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services.
CoRR, 2023

NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.
CoRR, 2023

FaaSCell: A Case for Intra-node Resource Management: Work-In-Progress.
Proceedings of the 1st Workshop on SErverless Systems, Applications and MEthodologies, 2023

Impact of Voltage Scaling on Soft Errors Susceptibility of Multicore Server CPUs.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

DAPHNE Runtime: Harnessing Parallelism for Integrated Data Analysis Pipelines.
Proceedings of the Euro-Par 2023: Parallel Processing Workshops - Euro-Par 2023 International Workshops, Limassol, Cyprus, August 28, 2023


Validation, Verification, and Testing (VVT) of future RISC-V powered cloud infrastructures: the Vitamin-V Horizon Europe Project perspective.
Proceedings of the IEEE European Test Symposium, 2023


2022
An Earthquake-Clustering Model in North Aegean Area (Greece).
Axioms, 2022

FaaS in the age of (sub-)<i>μs</i> I/O: a performance analysis of snapshotting.
Proceedings of the SYSTOR '22: The 15th ACM International Systems and Storage Conference, Haifa, Israel, June 13, 2022

DaxVM: Stressing the Limits of Memory as a File Interface.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022


2021
Exploiting Page Table Locality for Agile TLB Prefetching.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

SynCron: Efficient Synchronization Support for Near-Data-Processing Architectures.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020
Enabling Virtual Memory Research on RISC-V with a Configurable TLB Hierarchy for the Rocket Chip Generator.
CoRR, 2020

Enhancing and Exploiting Contiguity for Fast Memory Virtualization.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

A Configurable TLB Hierarchy for the RISC-V Architecture.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

2019
ACTiManager: An end-to-end interference-aware cloud resource manager.
Proceedings of the 20th International Middleware Conference Demos and Posters, 2019

DICER: Diligent Cache Partitioning for Efficient Workload Consolidation.
Proceedings of the 48th International Conference on Parallel Processing, 2019

2018
Efficient resource management for data centers: the ACTiCLOUD approach.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

Performance Prediction of NUMA Placement: A Machine-Learning Approach.
Proceedings of the 2018 IEEE International Conference on Cloud Computing Technology and Science, 2018

2017

Improving QoS and Utilisation in modern multi-core servers with Dynamic Cache Partitioning.
Proceedings of the Joined Workshops COSH 2017 and VisorHPC 2017, 2017

2016
Improving the performance and energy-efficiency of virtual memory.
PhD thesis, 2016

Range Translations for Fast Virtual Memory.
IEEE Micro, 2016

Energy-efficient address translation.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2015
NEMsCAM: A novel CAM cell based on nano-electro-mechanical switch and CMOS for energy efficient TLBs.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

Redundant memory mappings for fast access to large memories.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

2014
Performance analysis of the memory management unit under scale-out workloads.
Proceedings of the 2014 IEEE International Symposium on Workload Characterization, 2014

Dynamic transaction coalescing.
Proceedings of the Computing Frontiers Conference, CF'14, 2014

2013
Improving the energy efficiency of hardware-assisted watchpoint systems.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2011
RMS-TM: a comprehensive benchmark suite for transactional memory systems (abstracts only).
SIGMETRICS Perform. Evaluation Rev., 2011

RMS-TM: a comprehensive benchmark suite for transactional memory systems.
Proceedings of the ICPE'11, 2011

DiDi: Mitigating the Performance Impact of TLB Shootdowns Using a Shared TLB Directory.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011


  Loading...