Vasile Gheorghita Gaitan
Orcid: 0000-0001-9899-5111
According to our database1,
Vasile Gheorghita Gaitan
authored at least 29 papers
between 2008 and 2024.
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Bibliography
2024
Industrial Internet of Things Gateway with OPC UA Based on Sitara AM335X with ModbusE Acquisition Cycle Performance Analysis.
Sensors, April, 2024
Comput., March, 2024
Modbus Extension Server Implementation for BIoT-Enabled Smart Switch Embedded System Device.
Sensors, January, 2024
2023
Correction to: FPGA implementation of hardware accelerated RTOS based on real-time event handling.
J. Supercomput., September, 2023
J. Supercomput., 2023
Soft-core processor integration based on different instruction set architectures and field programmable gate array custom datapath implementation.
PeerJ Comput. Sci., 2023
Custom Soft-Core RISC Processor Validation Based on Real-Time Event Handling Scheduler FPGA Implementation.
IEEE Access, 2023
2022
Modbus Protocol Performance Analysis in a Variable Configuration of the Physical Fieldbus Architecture.
IEEE Access, 2022
2021
Sensors, 2021
Experimental Implementation and Performance Evaluation of an IoT Access Gateway for the Modbus Extension.
Sensors, 2021
2020
Comput., 2020
2019
Hardware Scheduler Implementation based on Replicated Resource Architecture for Reconfigurable Systems.
Proceedings of the ISCSIC 2019: 3rd International Symposium on Computer Science and Intelligent Control, 2019
2018
CoRR, 2018
2017
Implementation of nMPRA CPU architecture based on preemptive hardware scheduler engine and different scheduling algorithms.
IET Comput. Digit. Tech., 2017
2016
KSII Trans. Internet Inf. Syst., 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
Intelligent Device Used by an Infotmation System for Identifying and Monitoring of Patients.
CoRR, 2015
A distributed software architecture for remote monitor and control of the smart buildings.
Proceedings of the 2015 International Workshop on Computational Intelligence for Multimedia Understanding, 2015
Proceedings of the 2015 IEEE European Modelling Symposium, 2015
Proceedings of the 2015 7th International Conference on Electronics, 2015
Methods to Improve the Performances of the Real-Time Operating Systems for Small Microcontrollers.
Proceedings of the 20th International Conference on Control Systems and Computer Science, 2015
2014
Intensive computing on a large data volume with a short-vector single instruction multiple data processor.
IET Comput. Digit. Tech., 2014
Proceedings of the 10th International Conference on Communications, 2014
2012
Dynamic, unbalanced distribution of tasks on a PS3 cluster system for double precision calculation.
J. Supercomput., 2012
Custom designed CPU architecture based on a hardware scheduler and independent pipeline registers - architecture description.
Proceedings of the 2012 Proceedings of the 35th International Convention, 2012
Proceedings of the 9th International Conference on Communications, 2012
Custom designed CPU architecture based on a hardware scheduler and independent pipeline registers - Concept and theory of operation.
Proceedings of the 2012 IEEE International Conference on Electro/Information Technology, 2012
2008
High Complexity Control Gates with Advanced RFID Features for Production Process Monitoring.
Proceedings of the 22nd International Conference on Advanced Information Networking and Applications, 2008