Vanderson H. Fragal

According to our database, Vanderson H. Fragal authored at least 7 papers between 2013 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Hierarchical featured state machines.

Vanderson Hafemann Fragal, Adenilso da Silva Simão, Mohammad Reza Mousavi

Sci. Comput. Program., 2019

Extending HSI Test Generation Method for Software Product Lines.

Vanderson Hafemann Fragal, Adenilso Simão, Mohammad Reza Mousavi, Uraz Cengiz Türker

Comput. J., 2019

2018

Automatic generation of configurable test-suites for software product lines.

Vanderson H. Fragal

PhD thesis, 2018

2017

Reducing the Concretization Effort in FSM-Based Testing of Software Product Lines.

Vanderson Hafemann Fragal, Adenilso Simão, André Takeshi Endo, Mohammad Reza Mousavi

Proceedings of the 2017 IEEE International Conference on Software Testing, 2017

2016

Validated Test Models for Software Product Lines: Featured Finite State Machines.

Vanderson H. Fragal, Adenilso Simão, Mohammad Reza Mousavi

Proceedings of the Formal Aspects of Component Software - 13th International Conference, 2016

2013

SyMPLES - A SysML-based Approach for Developing Embedded Systems Software Product Lines.

Rogério F. da Silva, Vanderson H. Fragal, Edson A. Oliveira Junior, Itana Maria de Souza Gimenes, Flávio Oquendo

Proceedings of the ICEIS 2013, 2013

Application Engineering for Embedded Systems - Transforming SysML Specification to Simulink within a Product-Line based Approach.

Vanderson H. Fragal, Rogério F. da Silva, Itana Maria de Souza Gimenes, Edson A. Oliveira Junior

Proceedings of the ICEIS 2013, 2013