Valery Sklyarov

Orcid: 0000-0003-0349-8329

Affiliations:
  • Instituto de Engenharia Electronica e Telematica de Aveiro, Portugal


According to our database1, Valery Sklyarov authored at least 70 papers between 1998 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2019
FPGA-BASED Hardware Accelerators
Lecture Notes in Electrical Engineering 566, Springer, ISBN: 978-3-030-20720-5, 2019

2017
Data processing in the firmware systems for logic control based on search networks.
Autom. Remote. Control., 2017

RAM-based mergers for data sort and frequent item computation.
Proceedings of the 40th International Convention on Information and Communication Technology, 2017

Reconfigurable systems in engineering education: Best practices and future trends.
Proceedings of the 2017 IEEE Global Engineering Education Conference, 2017

2016
On-Chip Reconfigurable Hardware Accelerators for Popcount Computations.
Int. J. Reconfigurable Comput., 2016

Computing Sorted Subsets for Data Processing in Communicating Software/Hardware Control Systems.
Int. J. Comput. Commun. Control, 2016

2015
Multi-core DSP-based Vector Set Bits Counters/Comparators.
J. Signal Process. Syst., 2015

Comparison of On-chip Communications in Zynq-7000 All Programmable Systems-on-Chip.
IEEE Embed. Syst. Lett., 2015

Design and implementation of counting networks.
Computing, 2015

Integration of high-level synthesis to the courses on reconfigurable digital systems.
Proceedings of the 38th International Convention on Information and Communication Technology, 2015

FPGA-based time and cost effective Hamming weight comparators for binary vectors.
Proceedings of the IEEE EUROCON 2015, 2015

Analysis and Comparison of Attainable Hardware Acceleration in All Programmable Systems-on-Chip.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014
FPGA-based Accelerators for Parallel Data Sort.
Appl. Comput. Syst., 2014

High-performance implementation of regular and easily scalable sorting networks on an FPGA.
Microprocess. Microsystems, 2014

Teaching FPGA-based systems.
Proceedings of the 2014 IEEE Global Engineering Education Conference, 2014

Design space exploration in multi-level computing systems.
Proceedings of the 15th International Conference on Computer Systems and Technologies, 2014

2013
Hardware implementations of software programs based on hierarchical finite state machine models.
Comput. Electr. Eng., 2013

Implementation of parallel operations over streams in extensible processing platforms.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Implementation of address-based data sorting on different FPGA platforms.
Proceedings of the East-West Design & Test Symposium, 2013

Address-based data processing over N-ary trees.
Proceedings of Eurocon 2013, 2013

Optimization of address-based data sorting unit with external memory support.
Proceedings of the Computer Systems and Technologies, 2013

2012
Performance evaluation for FPGA-based processing of tree-like structures.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Methodology and international collaboration in teaching reconfigurable systems.
Proceedings of the IEEE Global Engineering Education Conference, 2012

2011
Implementation in FPGA of Address-Based Data Sorting.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

High-performance hardware accelerators for sorting and managing priorities.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

Recursion and hierarchy in digital design and prototyping: a case study.
Proceedings of the 12th International Conference on Computer Systems and Technologies, 2011

2010
Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

Parallel FPGA-Based Implementation of Recursive Sorting Algorithms.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

Application-specific hardware accelerator for implementing recursive sorting algorithms.
Proceedings of the International Conference on Field-Programmable Technology, 2010

2009
Recursion in reconfigurable computing: A survey of implementation approaches.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008
Multimedia Tools and Architectures for Hardware/Software Co-Simulation of Reconfigurable Systems.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Recursive versus Iterative Algorithms for Solving Combinatorial Search Problems in Hardware.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

2007
A prototyping system for mobile devices.
Proceedings of the International Conference on Wireless Communications and Mobile Computing, 2007

Reuse Technique in Hardware Design.
Proceedings of the IEEE International Conference on Information Reuse and Integration, 2007

Encoding Algorithms for Logic Synthesis.
Proceedings of the 2007 IEEE/ACS International Conference on Computer Systems and Applications (AICCSA 2007), 2007

Software/Configware Implementation of Combinatorial Algorithms.
Proceedings of the 2007 IEEE/ACS International Conference on Computer Systems and Applications (AICCSA 2007), 2007

2006
Multimedia Tools for Teaching Reconfigurable Systems.
Proceedings of the MoMM'2006, 2006

Reconfigurable Systems and their Influence on Mobile and Multimedia Applications.
Proceedings of the MoMM'2006, 2006

E-learning Tools and Web-resources for Teaching Reconfigurable Systems.
Proceedings of the Education for the 21st Century, 2006

Recursive and Iterative Algorithms for N-ary Search Problems.
Proceedings of the Toward Category-Level Object Recognition, 2006

Evolutionary Algorithm for State Encoding.
Proceedings of the Artificial Intelligence in Theory and Practice, 2006

2005
Teaching reconfigurable systems: methods, tools, tutorials, and projects.
IEEE Trans. Educ., 2005

FPGA-based implementation and comparison of recursive and iterative algorithms.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

ARPA - A Technology Independent and Synthetizable System-on-Chip Model for Real-Time Applications.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2004
FPGA-based implementation of recursive algorithms.
Microprocess. Microsystems, 2004

Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers.
Proceedings of the Field Programmable Logic and Application, 2004

2003
High-Level Design Tools for FPGA-Based Combinatorial Accelerators.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Reconfigurable Systems in Education.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Architecture of a Reconfigurable Processor for Implementing Search Algorithm over Discrete Matrices.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

A Dynamically Reconfigurable Accelerator for Operations over Boolean and Ternary Vectors.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

Design Tools and Reusable Libraries for FPGA-Based Digital Circuits.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

Design of Digital Circuits on the Basis of Hardware Templates.
Proceedings of the International Conference on Embedded Systems and Applications, 2003

2002
Hardware/software modeling of FPGA-based systems.
Parallel Algorithms Appl., 2002

Reconfigurable models of finite state machines and their implementation in FPGAs.
J. Syst. Archit., 2002

An Evolutionary Algorithm for the Synthesis of RAM-Based FSMs.
Proceedings of the Developments in Applied Artificial Intelligence, 2002

2000
Synthesis of Control Circuits with Dynamically Modifiable Behavior on the Basis of Statically Reconfigurable FPGAs.
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

The Specification and Design of Parallel Logical Control Devices.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2000

1999
Hierarchical finite-state machines and their use for digital control.
IEEE Trans. Very Large Scale Integr. Syst., 1999

Graphical Description and Hardware Implementation of Parallel Control Algorithms.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999

Dynamically Reconfigurable Implementation of Control Circuits.
Proceedings of the VLSI: Systems on a Chip, 1999

Implementation of virtual control circuits in dynamically reconfigurable FPGAs.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Specification, Implementation and Testing of HFSMs in Dynamically Reconfigurable FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

FPGA-Targeted Development System for Embedded Applications.
Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999

Development System for FPGA-Based Digital Circuits.
Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

1998
Synthesis Tools and Design Environment for Dynamically Reconfigurable FPGAs.
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998

Logic Synthesis of Reconfigurable Control Circuits based on Mutually Exclusive Reprogrammable Elements.
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998

Design and implementation of control circuits based on dynamically reconfigurable FPGA.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

Integrated Development Environment for Logic Synthesis Based on Dynamically Reconfigurable FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 1998

Design of Virtual Digital Controllers Based on Dynamically Reconfigurable FPGAs.
Proceedings of the 24th EUROMICRO '98 Conference, 1998


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