Valery Axelrad

According to our database, Valery Axelrad authored at least 8 papers between 1990 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2013

Design and simulation of ESD-resistant ICs.

Valery Axelrad

Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

2006

Novel gate and substrate triggering techniques for deep sub-micron ESD protection devices.

Oleg Semenov, Hossein Sarbishaei, Valery Axelrad, Manoj Sachdev

Microelectron. J., 2006

2005

3.125 Gb/s power efficient line driver with 2-level pre-emphasis and 2 kV HBM ESD protection.

Krzysztof Iniewski, Valery Axelrad, Andrei Shibkov, Artur Balasinski, Sebastian Magierowski, Rafal Dlugosz, Adam Dabrowski

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

The Impact of CMOS technology scaling on MOSFETs second breakdown: Evaluation of ESD robustness.

Oleg Semenov, Hossein Sarbishaei, Valery Axelrad, Manoj Sachdev

Microelectron. Reliab., 2004

Design Strategies for ESD Protection in SOC.

Krzysztof Iniewski, Valery Axelrad, Andrei Shibkov, Artur Balasinski, Marek Syrzycki

Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

2000

Efficient Full-Chip Yield Analysis Methodology for OPC-Corrected VLSI Designs.

Valery Axelrad, Nicolas B. Cobb, M. O'Brien, Thuy Do, Tom Donnelly, Yuri Granik, Emile Y. Sahouria, Victor Boksha, Artur Balasinski

Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

1998

Grid quality and its influence on accuracy and convergence in device simulation.

Valery Axelrad

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1990

Fourier method modeling of semiconductor devices.

Valery Axelrad

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990