Valerio Pisati
According to our database1,
Valerio Pisati
authored at least 5 papers
between 1993 and 2000.
Collaborative distances:
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Bibliography
2000
A 450 Mbit/s parallel read/write channel with parity check and 16-state time variant Viterbi.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000
1999
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999
1997
A 200-MSample/s trellis-coded PRML read/write channel with analog adaptive equalizer and digital servo.
IEEE J. Solid State Circuits, 1997
1993
Novel Linearizaiton Circuit for BiCMOS Transconductors Used in High Frequency OTA-C Filters.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993