Valerie Lines
According to our database1,
Valerie Lines
authored at least 2 papers
between 2000 and 2005.
Collaborative distances:
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Bibliography
2005
A 1GHz embedded DRAM macro and fully programmable BIST with at-speed bitmap capability.
Proceedings of the 13th IEEE International Workshop on Memory Technology, 2005
2000
Proceedings of the 8th IEEE International Workshop on Memory Technology, 2000