Valeria Garofalo
According to our database1,
Valeria Garofalo
authored at least 11 papers
between 2007 and 2014.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2014
2011
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Analytical Calculation of the Maximum Error for a Family of Truncated Multipliers Providing Minimum Mean Square Error.
IEEE Trans. Computers, 2011
2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2008
Microelectron. J., 2008
Constrained piecewise polinomial approximation for hardware implementation of elementary functions.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007