Valeri Afanas'ev

According to our database1, Valeri Afanas'ev authored at least 7 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Comprehensive Performance and Reliability Assessment of Se-based Selector-Only Memory.
Proceedings of the IEEE International Reliability Physics Symposium, 2024

Novel Cross-Point Architecture utilizing Distributed Diode Selector for Read Margin Amplification.
Proceedings of the IEEE International Memory Workshop, 2024

2023
Impact of gate stack processing on the hysteresis of 300 mm integrated WS2 FETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

Improved MW of IGZO-channel FeFET by Reading Scheme Optimization and Interfacial Engineering.
Proceedings of the IEEE International Memory Workshop, 2023

2022
Enhanced performance and low-power capability of SiGeAsSe-GeSbTe 1S1R phase-change memory operated in bipolar mode.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Degradation mechanism of amorphous IGZO-based bipolar metal-semiconductor-metal selectors.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021
Threshold switching in a-Si and a-Ge based MSM selectors and its implications for device reliability.
Proceedings of the IEEE International Memory Workshop, 2021


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