Valentin Tihhomirov

According to our database, Valentin Tihhomirov authored at least 11 papers between 2004 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits.

Maksim Jenihhin, Giovanni Squillero, Thiago Santos Copetti, Valentin Tihhomirov, Sergei Kostin, Marco Gaudesi, Fabian Vargas, Jaan Raik, Matteo Sonza Reorda, Leticia Bolzani Poehls, Raimund Ubar, Guilherme Cardoso Medeiros

J. Electron. Test., 2016

Rejuvenation of NBTI-Impacted Processors Using Evolutionary Generation of Assembler Programs.

Francesco Pellerey, Maksim Jenihhin, Giovanni Squillero, Jaan Raik, Matteo Sonza Reorda, Valentin Tihhomirov, Raimund Ubar

Proceedings of the 25th IEEE Asian Test Symposium, 2016

2015

Rejuvenation of nanoscale logic at NBTI-critical paths using evolutionary TPG.

N. Palermo, Valentin Tihhomirov, Thiago Santos Copetti, Maksim Jenihhin, Jaan Raik, Sergei Kostin, Marco Gaudesi, Giovanni Squillero, Matteo Sonza Reorda, Fabian Vargas, Letícia Maria Bolzani Pöhls

Proceedings of the 16th Latin-American Test Symposium, 2015

2014

Automated Design Error Localization in RTL Designs.

Maksim Jenihhin, Anton Tsepurov, Valentin Tihhomirov, Jaan Raik, Hanno Hantson, Raimund Ubar, Gunter Bartsch, Jorge Hernán Meza Escobar, Heinz-Dietrich Wuttke

IEEE Des. Test, 2014

Diagnostic Test Generation for Statistical Bug Localization Using Evolutionary Computation.

Marco Gaudesi, Maksim Jenihhin, Jaan Raik, Ernesto Sánchez, Giovanni Squillero, Valentin Tihhomirov, Raimund Ubar

Proceedings of the Applications of Evolutionary Computation - 17th European Conference, 2014

2013

Assessment of diagnostic test for automated bug localization.

Valentin Tihhomirov, Anton Tsepurov, Maksim Jenihhin, Jaan Raik, Raimund Ubar

Proceedings of the 14th Latin American Test Workshop, 2013

2012

A scalable model based RTL framework zamiaCAD for static analysis.

Anton Tsepurov, Gunter Bartsch, Rainer Dorsch, Maksim Jenihhin, Jaan Raik, Valentin Tihhomirov

Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

Localization of Bugs in Processor Designs Using zamiaCAD Framework.

Anton Tsepurov, Valentin Tihhomirov, Maksim Jenihhin, Jaan Raik, Gunter Bartsch, Jorge Hernán Meza Escobar, Heinz-Dietrich Wuttke

Proceedings of the 13th International Workshop on Microprocessor Test and Verification, 2012

PSL assertion checkers synthesis with ASM based HLS tool ABELITE.

Maksim Jenihhin, Samary Baranov, Jaan Raik, Valentin Tihhomirov

Proceedings of the 13th Latin American Test Workshop, 2012

2005

Improved Fault Emulation for Synchronous Sequential Circuits.

Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, Raimund Ubar

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2004

Evaluating Fault Emulation on FPGA.

Peeter Ellervee, Jaan Raik, Valentin Tihhomirov, Kalle Tammemäe

Proceedings of the Field Programmable Logic and Application, 2004