Valentin Egloff
Orcid: 0000-0001-8295-6118
According to our database1,
Valentin Egloff
authored at least 8 papers
between 2020 and 2024.
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2021
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2024
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Bibliography
2024
Proceedings of the 30th IEEE International Symposium on On-Line Testing and Robust System Design, 2024
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024
2022
Exploration and conception of computing architectures of type computing in-memory based on emerging non volatile memories. (Exploration et conception d'architectures de calcul de type in-memory à base de mémoires non volatiles émergentes).
PhD thesis, 2022
Towards a Truly Integrated Vector Processing Unit for Memory-bound Applications Based on a Cost-competitive Computational SRAM Design Solution.
ACM J. Emerg. Technol. Comput. Syst., 2022
An Automated Design Methodology for Computational SRAM Dedicated to Highly Data-Centric Applications: Invited Paper.
Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding, 2022
2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020