Vakkalakula Bharath Sreenivasulu

According to our database, Vakkalakula Bharath Sreenivasulu authored at least 3 papers in 2024.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2024

Analysis of Novel Core-Shell Junctionless Nanosheet FET for CMOS Logic Applications.

Vakkalakula Bharath Sreenivasulu, M. Prasad, Epuri Deepthi, Aruru Sai Kumar, S. Sudheer Mangalampalli

IEEE Access, 2024

A Novel L_G = 40 nm AlN-GDC-HEMT on SiC Wafer With f_T/I_DS,peak of 400 GHz/3.18 mA/mm for Future RF Power Amplifiers.

B. Mounika, Asisa Kumar Panigrahy, J. Ajayan, N. Khadar Basha, Vakkalakula Bharath Sreenivasulu, M. Durga Prakash, Sandip Bhattacharya, D. Nirmal

IEEE Access, 2024

Performance Improvement of Spacer-Engineered N-Type Tree Shaped NSFET Toward Advanced Technology Nodes.

Ummadisetti Gowthami, Asisa Kumar Panigrahy, Depuru Shobha Rani, Muralidhar Nayak Bhukya, Vakkalakula Bharath Sreenivasulu, M. Durga Prakash

IEEE Access, 2024