Vahid Rashtchi

Orcid: 0000-0002-1640-1023

According to our database1, Vahid Rashtchi authored at least 9 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Publisher Correction: Parallel chaos-based image encryption algorithm: high-level synthesis and FPGA implementation.
J. Supercomput., June, 2024

Parallel chaos-based image encryption algorithm: high-level synthesis and FPGA implementation.
J. Supercomput., May, 2024

2019
A Configurable Memristor-based Finite Impulse Response Filter.
CoRR, 2019

2018
Code Acceleration Using Memristor-Based Approximate Matrix Multiplier: Application to Convolutional Neural Networks.
IEEE Trans. Very Large Scale Integr. Syst., 2018

2015
FPGA Implementation of a Real-Time Weak Signal Detector Using a Duffing Oscillator.
Circuits Syst. Signal Process., 2015

2014
A Multiprocessor Nios II Implementation of Duffing oscillator Array for Weak signal Detection.
J. Circuits Syst. Comput., 2014

2013
Detecting the State of the Duffing oscillator by phase Space trajectory autocorrelation.
Int. J. Bifurc. Chaos, 2013

2010
Improvement of Ant Colony System by using of narrowing of search domain and adaptive number of search nodes.
Proceedings of the International Conference on Ultra Modern Telecommunications, 2010

Optimal coordination of overcurrent relays using Honey Bee algorithm.
Proceedings of the International Conference on Ultra Modern Telecommunications, 2010


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